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Using EDMA3 and VCP2 on TCI6488 Device

Sumit
Prodigy 10 points
Other Parts Discussed in Thread: TMS320TCI6488

Hi,

I want to build an application to share VCP2 across 3 cores of TCI6488 Device. My intent is to use the EDMA3 for VCP2 communication. I have following things in my mind

Core 0:

1. Init VCP2 and necessary hardware init

2. Check the status of VCP2 (using hardware sem), to see if it is free. if not, wait till is it free

3. When free, configure and trigger the EDMA3

4. Wait for completion interrupt from EDMA3

5. Release the VCP2 for other cores

 

Core 1 and 2:

1. Check the status of VCP2 (using hardware sem), to see if it is free. if not, wait till is it free

2. When free, configure and trigger the EDMA3

3. Wait for completion interrupt from EDMA3

4. Release the VCP2 for other cores

 

 

I am struck at Point 4 (core 0)/Point 3(core 1,2), i.e. how to get the interrupt from shared EDMA3.

EDMA3 has 2 channels (TX and RX) for VCP2 and has some shared regions concept. So is it possible to use different regions for same channels across cores?

Another option for me is to build the application for VCP2 and EDMA3 communication on one core (say master core) and rest of the cores sending request to this master core.

Please provide me the inputs on first option.

Thanks, Sumit

  • 0
    TI__Guru* 84110 points

    Sumit,

    Welcome to the TI E2E forum.

    Unfortunately, the TMS320TCI6488 device is not generally supported on the forum. Your best path is to contact your assigned Application Engineer or factory contacts who work with this device. The TCI6488 is supported for a specific marketplace and supported more directly by the TI factory for those customer engagements.

    I hope you find the help you need. Contact your sales office if you have this engagement and still need help finding these support people.

    By the way, the dark red highlighting makes it very difficult for me to read the highlighted lines.

    RandyP

  • 0
    Intellectual 775 points

    Why is hardware semaphore needed to monitor VCP2 status? I think VCP2 status register must be readable from all 3 cores, without any conflict.

    Do you use EDMA to program VPC2? If so, please check configuration of VCP2 and EDMA3? You can use CSL examples to check for the VPC2 and EDMA configurations.

    If you have CCS then you should be able to debug, step by step, to check if VCP2 control registers and EDMA3 channels are configured properly.

    Regards,

    Justin