TMS320C6748: DSPF_sp_fftSPxSP time cost

FrankXu

Part Number: TMS320C6748

According to http://software-dl.ti.com/sdoemb/sdoemb_public_sw/dsplib/latest//exports/DSPLIB_C674x_TestReport.html

the DSPF_sp_fftSPxSP cost 1069 clks when N=128 and 1965 clks when N=256.

I run the test project provided by TI, D:\ti\dsplib_c674x_3_4_0_0\packages\ti\dsplib\src\DSPF_sp_fftSPxSP.

Even with all optimization level -o3 and --opt_for_speed level 5, I can only get 1159 clks when N=128 and 2119 clks when N=256.

Why I cannot get 1069 and 1965 with the provided project?

Thank you.

over 5 years ago

0 Sahin Okur over 5 years ago

TI__Mastermind 27355 points

Hello,

Those benchmarks were tested using CGT version 7.4.2. Is that the version you have tested this with? If not, could you please try with it? It can be downloaded here: http://www.ti.com/tool/download/C6000-CGT-7-4

Regards,
Sahin

0 Rahul Prabhu over 5 years ago

TI__Guru** 116170 points

The Test Report provided in the DSPLIB was number obtained from cycle accurate simulator which assumes flat memory. On silicon to obtain performance closest to the reported performance, we recommend running code from L2 SRAM with L1P and L1D enabled as cache. Also, the test report was created with older version of compiler than what your are using since there hasn`t been an updated release for the library for couple of years now.

There are several E2E post regarding this issue. If you are interested in benchmarks as seen on C674x silicon, please refer to the following DSP benchmark portal and the application notes:

http://www.ti.com/processors/digital-signal-processors/core-benchmarks/core-benchmarks.html

0 FrankXu over 5 years ago in reply to Sahin Okur

Genius 3500 points

Hi Sahin,

Thank you very much for reply.

I used CGT 8.3.4. But I tried 7.4.2, the result is the same.

Frank

0 FrankXu over 5 years ago in reply to Rahul Prabhu

Genius 3500 points

Hello,

Thank you very much for reply.

Yes, In my test, I commented the "printf" lines, so that the .text section can all be put into the L1P sram.

Using L1P as program SRAM and L1D as data SRAM, the FFT for 256 data cost 2119 CLKS.

Using L1P as program Cache and L1D as data Cache, L2 as SRAM, the FFT for 256 data also cost 2515 CLKS for the first run, but also cost 2119 CLKS for the second and following runs.

And I tried the older compile, CGT 7.4.2, the result is the same.

In the following benchmark, it says 2401 CLKs for 256 data. http://www.ti.com/processors/digital-signal-processors/core-benchmarks/core-benchmarks.html

I just want to find the gap why I cannot get the 1965 CLKS, so that I can understand and do optimization to my codes better.

Thank you.

Frank

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TMS320C6748: DSPF_sp_fftSPxSP time cost