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PROCESSOR-SDK-AM335X: SPI configuration

Gaurav Aggarwal
Expert 2935 points
Part Number: PROCESSOR-SDK-AM335X

Hi,

I am using SKAM335x board and SDK RTOS on Windows Host PC

In SPI MCSPI_CH0CONF Register, what is the purpose of IS bit , DPE1 and DPE2 bits. I didn't understand properly. Please elaborate.

Thanks

Gaurav

  • 0
    Guru 13620 points

    Hi Gaurav,

    Please refer section "24.3.1.1 Two Data Pins Interface Mode" of TRM : 

    So basically there is no fixed MOSI/MISO in the case of McSPI. We can either configure, in the case of master, SPIDAT[0] as MOSI, aka transmit pin(or output pin). And SPIDAT[1] as MISO, or receive pin(or input pin). We can also configure vice versa. It depends on how the slave is connected to AM335x. 

    Example:

    So suppose SPIDAT[0] is configured as MOSI(Master output), in the case of master, aka transmit pin and SPIDAT[1] as MISO(master input), aka receive pin, then

    IS(Input select) should be set to SPIDAT[1], so it should be set to 1

    DPE0 (transmission selection on SPIDAT[0]), should be set as 0, here 0 means enable transmission on SPIDAT[0]]

    DPE1(transmission selection on SPIDAT[1]), should be set as 1(here 1 means disable transmission on SPIDAT[1]), since we are using SPIDAT[1] as input.

    So to generalize(in a normal full duplex SPI pins with MOSI/MISO), if IS is selected as 1, then DPE0 should be 0, and DPE1 should be 1

    and if IS is selected as 0, then DPE0 should be 1, and DPE1 should be 0.

  • 0 in reply to Dwarakesh Radhakrishnan
    Expert 2935 points

    Hi,

    Suppose both DPE0 and DPE1 bits are 0 and IS bit is also 0, then what will happen? How it will behave?

    Thanks

    Gaurav

  • 0 in reply to Gaurav Aggarwal
    Guru 13620 points 
    By chip, it can be programmed, but to get idea of what is supported, look at the low level driver code below

    Refer to this code for the possible combination. 


    static Int32 mcspiChannelConf(Mcspi_Object *instHandle,
                              const Mcspi_ChanObj *chanHandle, Error_Block *eb)
{
    UInt32 dataLineCommMode = 0;
    Int32  status           = IOM_COMPLETED;

    if (MCSPI_COMMMODE_MASTER == instHandle->spiHWconfig.masterOrSlave)
    {
        McSPIClkConfig((UInt32) instHandle->deviceInfo.baseAddress,
                       instHandle->deviceInfo.inputFrequency,
                       chanHandle->cfgChfmt.busFreq,
                       chanHandle->chanNum,
                       chanHandle->cfgChfmt.clockMode);
    }
    else
    {
        /* Slave mode: No need to set up the clock                            */
    }

    /* The FIFO is enabled as and when required in DMA mode of operation
     * FFER bit - by default it will be disabled                              */
    if (FALSE != chanHandle->fifoEnable)
    {
        McSPIRxFIFOConfig((UInt32) instHandle->deviceInfo.baseAddress,
                          (UInt32) MCSPI_RX_FIFO_ENABLE,
                          chanHandle->chanNum);
    }
    else
    {
        /* Do Nothing */
    }

    /* FFEW    bit - by default it will be disabled                           */
    if (FALSE != chanHandle->fifoEnable)
    {
        McSPITxFIFOConfig((UInt32) instHandle->deviceInfo.baseAddress,
                          (UInt32) MCSPI_TX_FIFO_ENABLE,
                          chanHandle->chanNum);
    }
    else
    {
        /* Do Nothing */
    }

    /* TCS     bit - enable the user defined params                           */
    McSPICSTimeControlSet((UInt32) instHandle->deviceInfo.baseAddress,
                          chanHandle->chipSelTimeControl,
                          chanHandle->chanNum);

    /* SBPOL   bit - default value (start bit mode not supported)             */
    /* SBPOL   bit - default value (start bit mode not supported)             */

    /* SBE     bit - default value (start bit mode not supported)             */

    if ((MCSPI_COMMMODE_SLAVE == instHandle->spiHWconfig.masterOrSlave) &&
        (0 == chanHandle->chanNum))
    {
        /* SPIENSLV bit - select appropriate chip select provided by the
         * application.
         */
        McSPISetSlaveChipSel((UInt32) instHandle->deviceInfo.baseAddress,
                             chanHandle->chanNum,
                             chanHandle->cfgChfmt.slaveModeChipSelect);
    }

    if (((MCSPI_IN == chanHandle->cfgChfmt.spiDat0Dir) &&
         (MCSPI_IN == chanHandle->cfgChfmt.spiDat1Dir)) &&
        (MCSPI_BOTH_RXTX == chanHandle->cfgChfmt.trasmitReceiveMode))
    {
        DBG_PRINT_ERR("Dat0 and Dat1 configured as Tx in transmit-receive mode"
                      "is NOT SUPPORTED!!!\r\n");
        status = IOM_EBADARGS;
    }

    if ((MCSPI_OUT == chanHandle->cfgChfmt.spiDat0Dir) &&
        (MCSPI_IN == chanHandle->cfgChfmt.spiDat1Dir))
    {
        dataLineCommMode = (UInt32) MCSPI_DATA_LINE_COMM_MODE_6;
    }
    else if ((MCSPI_IN == chanHandle->cfgChfmt.spiDat0Dir) &&
             (MCSPI_OUT == chanHandle->cfgChfmt.spiDat1Dir))
    {
        dataLineCommMode = (UInt32) MCSPI_DATA_LINE_COMM_MODE_1;
    }
    else if ((MCSPI_OUT == chanHandle->cfgChfmt.spiDat0Dir) &&
             (MCSPI_OUT == chanHandle->cfgChfmt.spiDat1Dir))
    {
        dataLineCommMode = (UInt32) MCSPI_DATA_LINE_COMM_MODE_4;
    }
    else
    {
        DBG_PRINT_ERR("Only (Dat0 - IN, Dat1 - OUT) and "
                      "(Dat0 - OUT,Dat1 - IN) and "
                      "LOOPBACK Mode are supported"
                      " No other modes are supported!!!\r\n");
        status = IOM_EBADARGS;
    }

    /* The PIN34 and INITDLY is only supported in single channel master
     * mode. There is some confusion that, the PIN34 mode is supported in slave
     * mode or not. This has to be verified. At this moment only master mode
     * has the PIN34 support.
     */
    if ((IOM_COMPLETED == status) &&
        ((MCSPI_COMMMODE_MASTER == instHandle->spiHWconfig.masterOrSlave) &&
         (MCSPI_SINGLE_CHANNEL ==
          instHandle->spiHWconfig.singleOrMultiChEnable) &&
         (TRUE != instHandle->isSingleChMasterMode)))
    {
        instHandle->isSingleChMasterMode = (Bool) TRUE;
        /* SINGLE  bit - enable the single master mode                        */

        if (MCSPI_PINOPMODE_3PIN == instHandle->spiHWconfig.pinOpModes)
        {
            /* PIN34   bit - enable the 3 pin mode                            */
            McSPICSDisable((UInt32) instHandle->deviceInfo.baseAddress);
        }
        else if (MCSPI_PINOPMODE_4PIN == instHandle->spiHWconfig.pinOpModes)
        {
            /* PIN34   bit - enable the 4 pin mode                            */
            McSPICSEnable((UInt32) instHandle->deviceInfo.baseAddress);
        }
        else
        {
            DBG_PRINT_ERR(" Invalid pin op mode\r\n");
            status = IOM_EBADARGS;
        }

        /* INTDLY      bit - No delay                                         */
        McSPIInitDelayConfig((UInt32) instHandle->deviceInfo.baseAddress,
                             instHandle->spiHWconfig. \
                             configChfmt[chanHandle->chanNum].spiWordInitDelay);

        McSPIMasterModeConfig((UInt32) instHandle->deviceInfo.baseAddress,
                              (UInt32) MCSPI_SINGLE_CH,
                              chanHandle->cfgChfmt.trasmitReceiveMode,
                              dataLineCommMode,
                              chanHandle->chanNum);
    }
    else if ((MCSPI_COMMMODE_SLAVE == instHandle->spiHWconfig.masterOrSlave) &&
             (MCSPI_SINGLE_CHANNEL ==
              instHandle->spiHWconfig.singleOrMultiChEnable))
    {
        status = (Int32) MCSPIPinDirSet(
            (UInt32) instHandle->deviceInfo.baseAddress,
            (UInt32) chanHandle->cfgChfmt.trasmitReceiveMode,
            dataLineCommMode,
            chanHandle->chanNum);
    }
    else if (TRUE == instHandle->isSingleChMasterMode)
    {
        DBG_PRINT_ERR("This Instance is already opened in single channel"
                      " master mode  \r\n");
        status = IOM_EBADARGS;
    }
    else if ((IOM_COMPLETED == status) &&
             ((MCSPI_COMMMODE_MASTER ==
               instHandle->spiHWconfig.masterOrSlave) &&
              (MCSPI_MULTI_CHANNEL ==
               instHandle->spiHWconfig.singleOrMultiChEnable) &&
              (TRUE != instHandle->isSingleChMasterMode)))
    {
        McSPIMasterModeConfig((UInt32) instHandle->deviceInfo.baseAddress,
                              (UInt32) MCSPI_MULTI_CH,
                              chanHandle->cfgChfmt.trasmitReceiveMode,
                              dataLineCommMode,
                              chanHandle->chanNum);
    }
    else
    {
        DBG_PRINT_ERR("SPIEN hold (FORCE bit) is "
                      "invalid in MULTI channel mode,"
                      "cannot open the channel\r\n");
        status = IOM_EBADARGS;
    }
    if (MCSPI_OPMODE_DMAINTERRUPT == instHandle->opMode)
    {
        /* DMAR    bit - disable -  Enable whenever required since only
         * one channel can use dma fifo at a time
         */

        /* DMAW    bit - enable                                               */
        McSPIDMADisable((UInt32) instHandle->deviceInfo.baseAddress,
                        ((UInt32) MCSPI_DMA_RX_EVENT |
                         (UInt32) MCSPI_DMA_TX_EVENT),
                        chanHandle->chanNum);
    }

    /* TRM     bit - enable 'Both_RxTx' - only a supported mode               */

    /* WL bit - write user specified val 'charLength'. First make WL bits
     * (11:7) to zero, then write the required value
     */
    McSPIWordLengthSet((UInt32) instHandle->deviceInfo.baseAddress,
                       MCSPI_WORD_LENGTH((chanHandle->cfgChfmt.
                                          charLength)),
                       chanHandle->chanNum);

    /* EPOL    bit - use 'spiChipSelectEnablePol'                             */
    if (TRUE == chanHandle->cfgChfmt.spiChipSelectEnablePol)
    {
        McSPICSPolarityConfig((UInt32) instHandle->deviceInfo.baseAddress,
                              (UInt32) MCSPI_CS_POL_HIGH,
                              chanHandle->chanNum);
    }
    else
    {
        McSPICSPolarityConfig((UInt32) instHandle->deviceInfo.baseAddress,
                              (UInt32) MCSPI_CS_POL_LOW,
                              chanHandle->chanNum);
    }
    return status;
}

  • 0 in reply to Dwarakesh Radhakrishnan
    Expert 2935 points

    Hi,

    I am making 0 for DPE0, DPE1, and IS. I didn't connect any slave and no physical connection between DATA1 and DATA0 line. 

    Here I am sending 5. How it is receiving 5 without any physical connection?

    while(1)
    {

    McSPITransmitData(SPI_BASE_ADD,5,MCSPI_CHANNEL_0);



    a=McSPIReceiveData(SPI_BASE_ADD,MCSPI_CHANNEL_0);

    ConsoleUtilsPrintf("a=%d\n",a);
    }

    After receiving a value is 5.

    Regards

    Gaurav

  • 0 in reply to Gaurav Aggarwal
    Guru 13620 points

    Hi Gaurav,

    As the code points out, it looks like it is enabling internal loopback mode. Make DPE0 to 1 or IS to 1(any of these) then you would be not getting data. Then try to loopback externally with a wire

  • 0 in reply to Dwarakesh Radhakrishnan
    Expert 2935 points

    Ok.

    But no where is mention about internal loopback, that's why I am getting doubt.

    Thanks

    Gaurav

  • 0 in reply to Gaurav Aggarwal
    Guru 13620 points

    Experiment by setting IS to 1 and check if It is again doing a loop back. 

  • 0 in reply to Dwarakesh Radhakrishnan
    Expert 2935 points

    Hi,

    Yes, it is doing again loopback with option you mentioned.

    Thanks

    Gaurav

  • 0 in reply to Gaurav Aggarwal
    Guru 13620 points

    Hi,

    It looks like it is documented here : 

    "AM335x PRSDK 6.0.0.7 here: pdk_am335x_1_0_15\packages\ti\drv\spi\example\mcspiLoopbackApp The source code for this example is here: pdk_am335x_1_0_15\packages\ti\drv\spi\example\mcspiLoopbackApp\src\mcspiLoopbackApp.c. Looking inside this file, I observe the following comments:

    * \brief This file contains the application which demonstrates McSPI loopback
    * which transfers some data pattern from data I/O signal & receives
    * the data from same data I/O signal.

    /* Loopback mode is not available for MCSPI. To test Loopback on McSPI,
    * Receive Bit is enabled on both Tx and Rx pins of McSPI
    */

    "

    Below e2e link documents it :

    e2e.ti.com/.../849858

  • 0 in reply to Dwarakesh Radhakrishnan
    Expert 2935 points

    Thanks for helping me.

    Regards

    Gaurav