[TDA4VM] PCIe EP write delay issue

felix xu

Hi, TI Expert:

There is a explicit delay in PCIE EP driver

https://git.ti.com/gitweb?p=ti-linux-kernel/ti-linux-kernel.git;a=blob;f=drivers/pci/endpoint/functions/pci-epf-test.c;h=c7003c2dbbb2199070d9af9638d0c54419093fa3;hb=refs/heads/ti-linux-4.19.y#l328

This delay adds some extra latency on PCIE transactions.

Could you give me some information about this delay? Can this delay be fixed by other software method or totally un-fixable?

Thanks

over 5 years ago

0 TommySong over 5 years ago

TI__Genius 9520 points

Hi, Felix,

In the code, normally the date write operation will be done by DMA. The sleep is just to wait memory copy to finishe.

In my understanding, the code can directly return with success code as the DMA transfer completed successfully.

Please let us know if misunderstanding here.

304         src_addr = dma_map_single(dma_dev, buf, reg->size, DMA_TO_DEVICE);
 305         if (dma_mapping_error(dma_dev, src_addr)) {
 306                 dev_err(dev, "failed to map source buffer address\n");
 307                 memcpy_toio(dst_addr, buf, reg->size);
 308                 goto skip_dma;
 309         }
 310 
 311         ktime_get_ts64(&start);
 312         tx = pci_epf_tx(epf, phys_addr, src_addr, reg->size);
 313         if (tx) {
 314                 dev_err(dev, "DMA transfer failed, using memcpy..\n");
 315                 ktime_get_ts64(&start);
 316                 memcpy_toio(dst_addr, buf, reg->size);
 317         }
 318         ktime_get_ts64(&end);
 319         pci_epf_print_rate("WRITE", reg->size, &start, &end, !tx);
 320 
 321         dma_unmap_single(dma_dev, src_addr, reg->size, DMA_TO_DEVICE);
 322 
 323 skip_dma:
 324         /*
 325          * wait 1ms inorder for the write to complete. Without this delay L3
 326          * error in observed in the host system.
 327          */
 328         usleep_range(1000, 2000);

Br, Tommy

0 felix xu over 5 years ago in reply to TommySong

Intellectual 500 points

Hi, Tommy:

Once the code return success, then EP sends a MSI to notify RC that data write is done. Finally, RC read data.

Without usleep_range(), RC would get corrupted data. This is what the comment says.

0 TommySong over 5 years ago in reply to felix xu

TI__Genius 9520 points

Hi, Felix,

That's right. Need some delay for memory copy when DMA not configured successful for any reason.

For DMA case, the data transfer was already done in the call pci_epf_tx and you can see in LINE 318 to get the end time for throughput calculation.

Br, Tommy

Processors

Processors forum

[TDA4VM] PCIe EP write delay issue