CCS/TDA2PXEVM: TDA2PXEVM

Hi,

We have created a separate app for performance test and will be included in next release. I have copied the function.

system_printf()  should work.. 

Here is function, we use in measurement.

void Ipc_runPerfTest(uint32_t coreId, uint32_t numCount, uint32_t testId)
{
RPMessage_Handle handle;

uint32_t iCnt;
volatile uint64_t roundtrip_start, roundtrip_delta;
uint64_t frq;
uint32_t myEndPt = 0;
int32_t status = IPC_SOK;

uint8_t buf[512];
uint32_t bufSize = 4;
uint32_t remoteEndPt;
uint32_t remoteProcId;
uint16_t len;

roundtrip_delta = 0U;
frq = Ipc_getTimestampFrq();

handle = Ipc_createRpmsg(tstBuf, RPMSG_DATA_SIZE, &myEndPt);
if(NULL != handle)
{
status = RPMessage_getRemoteEndPt(coreId, SERVICE, &remoteProcId,
&remoteEndPt, BIOS_WAIT_FOREVER);
if(coreId != remoteProcId)
{
SystemP_printf("Ipc_runPerfTest (remote %d): RPMessage_getRemoteEndPt() failed %d\n",
coreId);
status = IPC_EFAIL;
}

for(iCnt = 0U; iCnt < numCount; iCnt++)
{
buf[0] = IPC_PERF_TEST;

roundtrip_start = Ipc_getTimeInUsec(frq);

status = RPMessage_send(handle, coreId, ENDPT1, myEndPt, (Ptr)buf, bufSize);
if (status != IPC_SOK)
{
SystemP_printf("Ipc_runPerfTest (remote %d): rpmsg_senderFxn: RPMessage_send "
" failed status %d\n", coreId, status);
}
/* wait a for a response message: */
len = bufSize;
status = RPMessage_recv(handle, (Ptr)buf, &len, &remoteEndPt,
&remoteProcId, IPC_RPMESSAGE_TIMEOUT_FOREVER);
if(status != IPC_SOK)
{
SystemP_printf("Ipc_runPerfTest (remote %d): RPMessage_recv failed with code %d\n",
coreId, status);
}
roundtrip_delta += (Ipc_getTimeInUsec(frq) - roundtrip_start);
}

roundtrip_delta = roundtrip_delta/numCount;
SystemP_printf("Host: %s, Remote: %s, Size: %d, Roundtrip Time: %d us\n",
Ipc_mpGetSelfName(), Ipc_mpGetName(coreId), bufSize,
(uint32_t)roundtrip_delta);

/* Store test result data */
Ipc_addPerfTestResult(testId, (uint32_t)roundtrip_delta);
}

RPMessage_delete(&handle);
}

uint64_t Ipc_getTimestampFrq(void)
{
Types_FreqHz frq;
uint64_t retFrq;

Timestamp_getFreq(&frq);
retFrq = ((uint64_t) frq.hi << 32) | frq.lo;
return retFrq;
}

uint64_t Ipc_getTimeInUsec(uint64_t frq)
{
Types_Timestamp64 bios_timestamp64;
uint64_t cur_ts;

Timestamp_get64(&bios_timestamp64);
cur_ts = ((uint64_t) bios_timestamp64.hi << 32) | bios_timestamp64.lo;
return (cur_ts*1000000u)/frq;
}

Also,

Please configure L1D, L2 cache in linker_c66x_c66xdsp_1_sysbios.lds

/* Set L1D, L1P and L2 Cache Sizes */
ti_sysbios_family_c66_Cache_l1dSize = 32768;
ti_sysbios_family_c66_Cache_l1pSize = 32768;
ti_sysbios_family_c66_Cache_l2Size = 32768;

Hi Santosh,

  how to config DDR in R5F/MPU when IPC/lld Benchmarking ?

   In 《Jacinto Training Series_J7 IPC.pdf》doc, Setup Details:

  R5F/MPU config: DDR config

    bufferable-1

    cacheable-1

    shareable-0

Thanks & Regards, 

 lei

Hi Lei,

I have created a package which includes source code for ipc_perf_test and script to install it. 

It can be installed on top of psdkra 6.1 release.

I have also attached Readme file which lists detailed instruction to install, build and run ipc_perf_test.

Hope this will help you.

Thanks & Regards,

Santoshhttps://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/8132.ipc_2D00_patch.tgz

Installation
====================================================================

# go to psdkra install folder
cd ~/psdk_rtos_auto_j7_06_01_00_15

# Download gcc linraro tool-chain
wget https://releases.linaro.org/components/toolchain/binaries/7.2-2017.11/aarch64-elf/gcc-linaro-7.2.1-2017.11-x86_64_aarch64-elf.tar.xz

# extract the files
tar xf gcc-linaro-7.2.1-2017.11-x86_64_aarch64-elf.tar.xz

# copy the patch to psdkra folder
cp ~/Download>/ipc-patch.tgz .

# extract the patch here
tar -zxvf ipc-patch.tgz

# go to ipc-patch
cd ipc-patch

# run the script to install
./ipc-pkg-install.sh

# go to build folder
cd ../pdk/packages/ti/build

#build the ipc performance test
make -s ipc_perf_test

==================================================================
Running the app

1) set board in no-boot mode
   BOOT/MCU Switch
   [0-7]  -->  10001000
   [2-9]  -->  01110000

2) Modify the launch.js to match pdk root directory
   <psdkra_root>/pdk/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/launch.js
   pdkPath = "/home/sjha/psdk_rtos_auto_j7_06_01_00_15/pdk";

   Line#134, please check:
   dsDMSC_0.expression.evaluate("J7ES_LPDDR4_4266MTs_Config_Late()");

3) Update ipc-patch/ipc_perfTest_loadcores.js
   pdkPath = "/home/sjha/psdk_rtos_auto_j7_06_01_00_15/pdk/";

3) Launch CCS, and launch target configuration for J7ES_SVB_XDS560v2_USB

4) open CCS 'Scripting Console'  (Menu View -> Scripting Console)

5) Power ON the evm

6) loadJSFile("/home/sjha/psdk_rtos_auto_j7_06_01_00_15/pdk/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/launch.js")

7) Once completed, manually CPU reset MCU_Cortex_R5_0 core

8) loadJSFile("/home/sjha/psdk_rtos_auto_j7_06_01_00_15/ipc-patch/ipc_perfTest_loadcores.js")

9) Once loading is done, it will start testing and ccs console will print the latency measurement.

HI santosh,

  Thank you for your ipc_perf_test, I normal work running, but just only test tranfer 4byte. I will try to modify code to  tranfer big datra by IPC.

  Can I Loading  ipc_perf_test app using SPL/uBoot ? If The answer is ok, How can I build & loading linux APP (A72) ?

  Thanks & Regards,

lei  

Lei,

I just used 4-bytes (sharing pointers across the core). Actual data is in shared memory allocated using CMEM.. The application can be modified for different payload size.

This application assumes all cores running SysBios. Please refer to example/echo_test for Linux application.

You will need to add resource table and also compile with A72_LINUX_OS, and wait for remoteproc status flag.

HI santosh,

  "Please refer to example/echo_test for Linux application." ,  This is mean refer to  IPC/LLD echo_test ?

  Thanks & Regards,

lei  

Santosh,

   Thank you for you help, I'm done ipc/lld perf test.

   The max transfer data size is 512 byte of ipc/lld. The ipc/lld can  use more size  share-buffer .

I'm confused this: why is the transmitted data less than 512 byte ？

Thanks & Regards,

Lei

Lei,

If you are transferring the shared memory, then there is no limitation from IPC/LLD.

If you want to transfer actual payload in IPC/LLD rather than pointer of shared address, then maxsize is (512 - rpmsg hdr size).

Thanks & Regards,

Santosh

Santosh,

I want to use shared memory between A72 、c66、r5f . 

 (1) How to change share memory size?  Need to 1Gb.

 (2) Can you tell me a demof of shared memory ?

 (3)  Shared memory is cached or not ?  

Thanks & Regards,

Lei

Lei,

VRing buffer is divided into 512bytes with 256 messages. So 512 bytes (minus rpmessage header size) is the maximum size one message can be in ipc/lld payload

But if you have larger buffer, then use shared buffer and send pointer (4byte) to the remote core. it will be fastest. and efficient.