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AM3354: IBIS usage for DDR3 simulation

murugan ramasamy1
Prodigy 30 points
Part Number: AM3354

Dear Team,

 

We are doing batch simulation in Hyperlynx for DDR3L interface with AM335x micro controller.

 

While configuring the ODT models, we are getting incompatibility issues.

 

So please suggest the right ODT models which are compatible with our DDR3L.

 

I have attached the list of models available in the tool after assigned our AM335x, and DDR3 IBIS models.

 

Inputs:

  1. Mico controller : AM3354BZCZA100
  2. DDR                     : AS4C512M16D3L-12BCN
  3. Write                   : Micro-Disabled, DDR-Enabled
  4. Read                    : Micro-Enabled, DDR-Disabled

 

Regards

Murugan R

IBIS Models.xlsx

  • 0
    TI__Mastermind 42545 points

    Hi Murugan,

    The selection of the model needed for your simulation is dependent on your system requirements, implementation and the type of access you are attempting to simulate.  The speed of you access will determine whether you are selecting the 1066, 1600 or 1866 version of the model.  ODT defines the on-die termination selected. Generally you would select the termination value that most closely matches the impedance used for the layout of the signals. This should reduce the reflections but part of the purpose of the simulation is to determine with ODT value works best with your layout.  Finally the model must be selected based on whether you are performing a read simulation or a write simulation. I can't make any determination on the model you should select based on the information you provided.

    Regards, Bill 

  • 0
    TI__Guru*** 125430 points

    Murugan,

    Please read through the following wiki page:

    http://processors.wiki.ti.com/index.php/How_to_use_the_AM335x_IBIS_Models

    It will help you to understand which models apply to what scenarios.

    Best regards,
    Brad