Hi,
My customer want to swap USB3.0 data pins on their board.
Please see below diagram.
It is much easier for customer to do layout.
According to USB3.x specification, there is “lane polarity inversion” feature and it seems mandatory.
6.4.2 Lane Polarity Inversion
6.4.2.1 Gen 1 Operation
During the TSEQ training sequence, the Receiver shall use the D10.2 Symbol within the TSEQ
Ordered Set to determine lane polarity inversion (Rxp and Rxn are swapped). If polarity
inversion has occurred, the D10.2 symbols within the TSEQ ordered set will be received as
D21.5 instead of D10.2 and the receiver shall invert the polarity of the received bits. This
shall be done before the TSEQ symbols 1-15 are used since these symbols are not all
symmetric under inversion in the 8b/10b domain. If the receiver does not use the TSEQ
training sequence then the polarity inversion may be checked against the D10.2 symbol in
the TS1 ordered set.
6.4.2.2 Gen 2 Operation
During reception of SYNC ordered sets the symbols of the SYNC Ordered Set shall be used to
determine whether a polarity inversion has occurred. If the SYNC identifier (and symbols 2,
4, 6, 8, 10, 12, and 14) are received as FFh instead of 00h then a polarity inversion has
occurred and the receiver shall invert the polarity of the received bits.
Does 66AK2H06 also support this feature?
Is there any software setting needed to use this feature?
Thanks and regards,
Koichiro Tashiro
