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CCS: 66AK2G12 QSPI library _ Read/write command , not read/write data

Part Number: 66AK2G12

Tool/software: Code Composer Studio

Hello, 

I'm using the 66AK2G12 board and S25FL512S(QSPI  nor flash) and board_flash library 

I want to use   512M-bit capacity of S25FL512S. 

but It's device supports 24 bit address  for backward software compatibility, So I want to change 32-bit Address mode  

In order for me do that, I have to use Bank Register Write Command to chagne 32-bit addressing required from command mode, 

but Board Flash library is not support command read/write ,

Only the following functions are supported:


Board_flashOpen(uint32_t deviceId, uint32_t portNum, void *params);
Board_flashClose(Board_flashHandle handle);
Board_flashRead(Board_flashHandle handle, uint32_t offset, uint8_t *buf, uint32_t len, void *params);
Board_flashWrite(Board_flashHandle handle, uint32_t offset, uint8_t *buf, uint32_t len, void *params);
Board_flashBlkPageToOffset(Board_flashHandle handle, uint32_t *offset, uint32_t block, uint32_t page);
Board_flashOffsetToBlkPage(Board_flashHandle handle, uint32_t offset, uint32_t *block, uint32_t *page);
Board_flashOffsetToSectorPage(Board_flashHandle handle, uint32_t offset, uint32_t *sector, uint32_t *page, bool hybridSector_flag);
Board_flashEraseBlk(Board_flashHandle handle, uint32_t block_number);

Is there a way for me to command register read/write or othre way to use 32-bit addressing mode ? 

Best Regards,
DG

  • Hi,
    Which Processor SDK RTOS version is this?
    Best Regards,
    Yordan

  • DG,

    I suspect that the 4 byte addressing is missing in the Board library for evmK2G but this issue has come up in the past and we have provided an example that is part of the QSPI driver flash test that demonstrates the switch from 3 byte addressing to 4 byte addressing. 

    Please locate the flash driver source file SF25FL.c that is located in 

    pdk_k2g_1_0_xx\packages\ti\drv\spi\test\qspi_flash\src\Flash_S25FL

    The function S25FLFlash_Enable4ByteAddrMode. Other than writing to flash configuration register to setup 32 byte addressing. The Erase, Read and Write functions need to check if the addr >0xffffff and then provided read/write length correctly when communicating with flash.

    I will file a feature request for the same to be implemented in Board but unitl then you can refer to the implementation in the source file that I referred to.

    Regards,

    Rahul

  • Rahul

    I tried to refer to the sample code as you told me.

    QSPI Open was performed normally and Handler was also returned.

    But Exception will occur and be called exit function
    When the SPI_control function is called in QSPI read and write function.

    ex) 
    SPI_control(handle, SPI_V1_CMD_SETCONFIGMODE, NULL);

    As I mentioned in the question, the function(Board_flash)  was confirmed to be QSPI Read/Write normal.

    So I don't think it's a hardware problem.

    Best Regards,

    DG

  • Hi, Yordan

    I'm using PDK version 1.0.14

    Best Regards,
    DG

  • Rahul 

    There were SPI_Control problems in the beginning,

    but they were solved and now they're working normally.

    Your answer was very helpful.
    Thank you.

    Best Regards,

    DG

  • Thanks for confirming that this resolves your issue.