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TDA4 ALT PDN ON EVM

Other Parts Discussed in Thread: TPS65911

Hi Ti team,

The EVM has some ALT power rail sources, what's the purpose for these? Any risk if we remove them?

Thanks a lot

B.R

Y.L 

  • Y.L,

    Which are the ALT power rails? I'm sorry I didn't find in the schematic 'ÁLT'

    regards,

    Stan

  • Hi Stan,

    Please refer to page 31 on EVM PROC078E_SCH.pdf

  • Hi,

    Looks like this was an alternative power supply for VDD_MCU_RAM_0V85 by discrete LDO. On the PROC078E2_SCH.pdf schematic, page 31 was deleted. VDD_MCU_RAM_0V85 is powered by U17 on page24.

    Regards,

    Stan

  • Hi Stan,

    We got latest EVM schematic “PROC078E7(001)_SCH”,it also included ALT power rails on page 31 and didn't has U17 on page 24.

    Refered to page 29 "SOC current sense resistors" only PDN option - C: VDD_SD_DV_ALT be used. 

    it might cause of VDD_SD_DV_REG come from PMIC-B(TPS659411) and couldn't detect card type then change power to 1.8V ,right?

    Thanks a lot

    B.R

    Y.L  

     

  • Y.L.,

    Both schematic page 29 and schematic page 31 state on the header that those circuits are for "TI EVM Only" and are intended as "EVM development and evaluation test circuitry".

    Regards,

    Kyle

  • The EVM supports 4 "alternative power resource options" (A - D) in case TI needs to conduct more in-depth testing. Only the Dual LDO (U101) is presently used to supply the VDD_SD_DV power rail through current sense resistor (R465, pg 29) on the EVM. All 3 other options are not needed and can be ignored for end customer designs.

    The new TPS65911-Q1 (aka PMIC-B, U29, pg 23) can also be used to supply VDD_SD_DV power rail on customer designs. The rev E7 EVM SCH & PCB do not show this preferred approach since the validation of dual voltage (3.3V & 1.8V) operation was verified after rev E7 SCH & PCB were released. A few TI internal EVMs have been modified (move current sense resistor from R465 to R464 location and add blue wire connecting SoC's control signal "SEL_SDIO_3V3_1V8n" from R521/U101-1 node to TP109 connecting to TPS65911's GPIO2) to enable TI SW team to develop & test code that enables PMIC-B LDO1 to source both 3.3V & 1.8V per SD card spec.

    Implementing this SEL_SDIO_3V3_1V8n connection to PMIC-B GPIO2 is on the update list for next EVM SCH & PCB revisions. I have attached an updated EVM PDN Overview diagram v0.40 that shows SEL_SDIO_3V3_1V8n as a "blue dashed" connection to indicate a wire mod & current sense R swap are both needed to existing EVM Rev E7 boards to select PMIC-B as VDD_SD_DV power source.

    Regards,

    Bill

    J721E_EVM_Dual_Leo_SoC_PDN_Overview_v0.40.pdf