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C6748 EMIF A Questions

Paul Joseph
Expert 2795 points

I am looking at EMIFA timing on  the data sheet (pg 115).  It lists some voltages.  Are these the internal core voltages?

Also, after looking at the EMIFA users guide and these timing specs, it appears that the fastest repetitive read access is 30 nSec (1 read setup clock, 1 read cycle clock and 1 read hold clock).  Is this true, or can I reduce to two 100 Mhz clocks somehow?

It says on Pg 40 of the EMIFA Users Guide (spruf16f) for NAND Data Read and Write (section 2.5.6.5) that “the EMIFA does not support constant addressing mode”.  Is this for all operations, or just for NAND devices? Will constant address mode work for Asynchronous transfers on EMIFA?

  • 0
    TI__Guru*** 125430 points

    Paul Joseph said:
    I am looking at EMIFA timing on  the data sheet (pg 115).  It lists some voltages.  Are these the internal core voltages?

    Yes, those voltages refer to CVDD.  Some timings change as a function of CVDD.

  • 0
    TI__Guru*** 125430 points

    Paul Joseph said:
    Also, after looking at the EMIFA users guide and these timing specs, it appears that the fastest repetitive read access is 30 nSec (1 read setup clock, 1 read cycle clock and 1 read hold clock).  Is this true, or can I reduce to two 100 Mhz clocks somehow?

    Looks like 1-1-1 is the fastest.

    Paul Joseph said:
    It says on Pg 40 of the EMIFA Users Guide (spruf16f) for NAND Data Read and Write (section 2.5.6.5) that “the EMIFA does not support constant addressing mode”.  Is this for all operations, or just for NAND devices? Will constant address mode work for Asynchronous transfers on EMIFA?

    When "constant addressing mode" is mentioned that is referring to a specific operating mode of the EDMA (see the "SAM" and "DAM" bits in the OPT register of the EDMA).  Although you're not allowed to use that specific mode you can still do whatever indexing you please (including fixed addresses) when programming the EDMA.