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AM5746: ESC reset register

Guru 10295 points

Part Number: AM5746

Hi Sitara support Team,

I would like to make sure about the ESC Reset register(0x0E14-0x0E17).

-PRU_ICSS_EtherCAT_Slave_Controller_Register_List Wiki site shows

 ESC Reset        0x0E14-0x0E17
 Vendor specific ESC WARM RESET register.
 Write "RST"(0x535251) or "rst" (0x737271) to force WARM RESET of AM335x

processors.wiki.ti.com/.../PRU_ICSS_EtherCAT_Slave_Controller_Register_List

 
Is this register for only AM335x device?
Does it ignore at using AM574x device?

Or is this register a substitute for the ET1100 RESET function?

Best regards,
Kanae

  • Kanae,

    The register is available for AM574x as well, see 

    void bsp_soft_reset()
    {
    HWREG(CSL_MPU_DEVICE_PRM_REGS + CSL_DEVICE_PRM_PRM_RSTCTRL_REG) = 1;
    return;
    }

    in tiesc_soc.c under protocols\ethercat_slave\ecat_appl\idkAM57x.

    It functions as ET1100 RESET function but in other mechanism.

    Regards,

    Garrett

     

  • Hi Garrett,

    Thank you for your reply.

    I understand that the register is available for AM574x as a software reset.
    Is this meant it resets all the RX packets, right? 

    But ESC Reset ECAT register is not ET1100 RESET function. 
    Is it correct?

    I would like to make sure what is "in other mechanism".

    Where does the ET1100 RESET function in TI ESC?

    Best regards,
    Kanae

  • Hi Garrett,

    Could you please reply for three questions?

    I appreciate to your support.

    Best regards,
    Kanae

  • Kanae,

    >>Is this meant it resets all the RX packets, right? 

    Yes. The global SW reset will reset PRU as well and all the Rx packets.

    >>ESC Reset ECAT register is not ET1100 RESET function. 
    Is it correct?

    ESC Rest register is 'Vendor specific ESC WARM RESET register.'

    "in other mechanism" means TI ESC 'Write "RST"(0x535251) or "rst" (0x737271)  to force WARM RESET of AM335x' in the register 0x0E14-0x0E17 32-bit, whereas a reset is asserted after writing 0x52 (‘R’), 0x45 (‘E’) and 0x53 (‘S’) in the register 0x40 (8-bit) with 3 consecutive frames in ET1100.

    Regards,
    Garrett

  • Hi Garrett,
    Thank you for your support!

    I would like to know the trigger of the reset assertion.
    What is the trigger of TI ESC WARM RESET (global S/W reset)assert?

    I check "3.5.1.1.2 Warm Reset" in TRM.
    ===========================================
    "3.5.1.1.2 Warm Reset"

    The device warm reset can be received from an external source or the device PRM module as a result of
    an internal event.
    The PRCM can generate the global reset used by the domain Reset Managers from these warm reset
    input sources:
    -SYS_WARM_IN_RST
    -MPU_WDT_RST
    -GLOBAL_SW_WARM_RST
    ===========================================

    For PRU-ICSS, the trigger of warm reset is only PRM_RSTCTRL register[0]; "RST_GLOBAL_WARM_SW" set "1".

    Is my understanding correct?
    Or are there other triggers for this reset function?

    Best regards,
    kanae

  • Kanae,

    The trigger of PRU-ICSS warm reset is PRM_RSTCTRL register[0]; "RST_GLOBAL_WARM_SW" as you referred.

    Also, PRU can be reset when bit 0 - SOFT_RST_N of PRU_CONTROL register is cleared, see PRUICSS_pruReset() function from PRUSS driver and referred in bsp_init() of tiescbsp.c.

    Regards,

    Garrett