Hi,
the C6747 on my board is uart2 booted then uart2's baud rate is changed to 230400. on my first prototype board is a C6747AZKB3 (d800k001 ROM) everything work fine. on the other board is a C6747BZKBT3 (d800k003+ ROM) the booting process is completed ok and C6747 is working fine (sending data from USB port to PC). But I lost uart2 after I change baud rate from 115200(default) to 230400
the code I use to change the baud rate is copied from C:\Program Files\Texas Instruments\pspdrivers_01_20_00\packages\ti\pspiom\cslr\evm6747\examples\uart\src\Uart_example.c
void init_uart(void)
{
//Note***uartRegs defined at begning of this file***
//line control register
uart2Regs->LCR = CSL_FMKT(UART_LCR_WLS,8BITS); //word length 8bits, 1 stop bit, no parity
//modem control register
// uart2Regs->MCR = CSL_FMKT(UART_MCR_RTS,ENABLE) //RTS control
// | CSL_FMKT(UART_MCR_LOOP,ENABLE) //loopback mode
// | CSL_FMKT(UART_MCR_AFE,ENABLE); //auto flow enable
//divisor latch
CSL_FINS(uart2Regs->DLL,UART_DLL_DLL,0x28);
//enable FIFO
uart2Regs->FCR = CSL_FMKT(UART_FCR_FIFOEN,ENABLE) //enable FIFO
| CSL_FMKT(UART_FCR_TXCLR,CLR) //clear transmitter FIFO
| CSL_FMKT(UART_FCR_RXCLR,CLR); //clear receiver FIFO
//enable transmitter and receiver
CSL_FINST(uart2Regs->PWREMU_MGMT,UART_PWREMU_MGMT_UTRST,ENABLE);
CSL_FINST(uart2Regs->PWREMU_MGMT,UART_PWREMU_MGMT_URRST,ENABLE);
uart0Regs->LCR = CSL_FMKT(UART_LCR_WLS,8BITS);
CSL_FINS(uart0Regs->DLL,UART_DLL_DLL,0x28);
uart0Regs->FCR = CSL_FMKT(UART_FCR_FIFOEN,ENABLE)
| CSL_FMKT(UART_FCR_TXCLR,CLR)
| CSL_FMKT(UART_FCR_RXCLR,CLR);
CSL_FINST(uart0Regs->PWREMU_MGMT,UART_PWREMU_MGMT_UTRST,ENABLE);
CSL_FINST(uart0Regs->PWREMU_MGMT,UART_PWREMU_MGMT_URRST,ENABLE);
}
void device_init(void)
{
//UART1 and UART2 are in CSL_PSC_1_REGS see soc_c6747.h cslr_psc_c6747.h
//UART0 is in CSL_PSC_0_REGS
CSL_PscRegsOvly psc1Regs = (CSL_PscRegsOvly)CSL_PSC_1_REGS;
CSL_PscRegsOvly psc0Regs = (CSL_PscRegsOvly)CSL_PSC_0_REGS;
// deassert UART local PSC reset and set NEXT state to ENABLE
psc1Regs->MDCTL[CSL_PSC_UART2] = CSL_FMKT( PSC_MDCTL_NEXT, ENABLE )
| CSL_FMKT( PSC_MDCTL_LRST, DEASSERT );
// move UART PSC to Next state
psc1Regs->PTCMD = CSL_FMKT( PSC_PTCMD_GO1, SET );
// wait for transition
while ( CSL_FEXT( psc1Regs->MDSTAT[CSL_PSC_UART2], PSC_MDSTAT_STATE )
!= CSL_PSC_MDSTAT_STATE_ENABLE );
psc0Regs->MDCTL[CSL_PSC_UART0] = CSL_FMKT( PSC_MDCTL_NEXT, ENABLE )
| CSL_FMKT( PSC_MDCTL_LRST, DEASSERT );
psc0Regs->PTCMD = CSL_FMKT( PSC_PTCMD_GO0, SET );
while ( CSL_FEXT( psc0Regs->MDSTAT[CSL_PSC_UART0], PSC_MDSTAT_STATE )
!= CSL_PSC_MDSTAT_STATE_ENABLE );
}
