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AM3358: EMIF tools usage

yf liao
Expert 1080 points
Part Number: AM3358
Other Parts Discussed in Thread: AM5718

Hi, first allow me to ask questions on AM3358 and AM5718 in one thread as we have two products using them. 

1. AM3358: we have single DDR3L device on board, do we still need to run the EMIF tools before section 3 software leveling to get register value updated? What happens if we never run the tools, and run the system at default value? assuming our product DDR3L chip and PCB are not same as any EVM board.

2. AM5718: the hardware leveling is supported, does that mean by default we do not need to run EMIF tools at all, or still need to run the tools before section 3?

  • 0
    TI__Guru* 90115 points

    1.  Please follow the instructions in http://www.ti.com/lit/pdf/sprack4  We just recently updated this document to better explain the procedure for initializing DDR on a custom platform.  In your specific case, you do no need to run the software leveling algorithm, but you do need to fill out the spreadsheet completely in order to obtain the correct PHY delays for your design.  The app note explains all of this.

    2.  For AM5718, the process is the same.  Follow the instructions here http://www.ti.com/lit/pdf/sprac36  (Note an updated version of this doc will be available after the holidays)  You need to completely fill out the spreadsheet (including trace lengths in the "Board Details" tab)and modify your code accordingly.  The spreadsheet will provide the starting seed values so that the hardware leveling will complete successfully.  Otherwise, H/W leveling may not converge properly.   

    Regards,

    James

  • 0 in reply to JJD
    Expert 1080 points

    Hi James,

    We have read the app note and tried to fill in the spreadsheet, but there are still some uncertainty from us, could you elaborate how to determine some of the values in the spreadsheet?

    The DDR3L chip we used is Samsung K4B4G1646E-BYMA, -1866(13-13-13). I attached datasheet.K4B4G1646E-BY_DDR3L_E die Rev10-0 453564764621.pdf

    1. ODT/Rtt_Nom: in app note, says using the settings in the “TI recommendation”, but in spreadsheet, it says to check datasheet recommendation. Then could you help to interpret what value the datasheet are actually recommending in table 29?

     

    2. Dynamic ODT: recommended value is RZQ/4 in AM335x EMIF tool, but in AM57xx EMIF tools, default is disabled. I don’t see datasheet says better to enable or disable, so we just follow the default value in each spreadsheet?

     

    3. Output Driver Impedance: Am I correct that the datasheet says support both 34ohms and 40ohms in table 26? So we can follow default value which is RZQ/6 for AM335x and RZQ/7 for AM57xx?

     

    3. CAS Latency: there is only value 5 and 6 available in the drop list when using a 1866MT/s device. From the datasheet table 51 of DDR3-1866 speed bins, I assume we should we should select CL=5, CWL=5 row?

     

     4. Step 3A), Delay in AM335x EMIF tools: Our PCB material has a typical delay of 145ps in microstrip and 170ps in stripline. Shall we still stick to 180ps/inch?

  • 0 in reply to yf liao
    TI__Guru* 90115 points

    Thanks for your feedback.  Answers below

    1.  The ODT values will typically come from signal integrity simulations performed with the IBIS models.  If you have not done this, I would stick with the TI recommendations from the spreadsheet.  These should suffice for most designs

    2.  Dynamic ODT is a feature of DDR3 devices, a

  • 0 in reply to JJD
    Expert 1080 points

    Hi James, your reply seems to be corrputed, could you send it again?

    JJD said:

    Thanks for your feedback.  Answers below

    1.  The ODT values will typically come from signal integrity simulations performed with the IBIS models.  If you have not done this, I would stick with the TI recommendations from the spreadsheet.  These should suffice for most designs

    2.  Dynamic ODT is a feature of DDR3 devices, a

  • 0 in reply to yf liao
    TI__Guru* 90115 points

    Sorry, seems like my reply got cut off

    2. Dynamic ODT is a feature of DDR3 devices, in which a different termination value can be used during write cycles as opposed to reads.  This can help with optimizing signal integrity depending on your design.   It is really up to the user to determine if dynamic ODT is necessary.   It is typically necessary for multi-rank designs, or high data rate designs.

    3.  Yes, DDR3 memories support both RZQ/6 and RZQ/7 for output impedance.  I would follow the recommendations for each device.

    4. You would use the speed bin table associated with DDR3-1866.  For AM335x at 400MHz (2.5ns cycle time), you would choose the CL and CWL with the 2.5ns min (ie, CL=6, CWL=5).  For AM57x, I'm not sure what frequency you will be operating at, so you will have to choose the appropriate CL and CWL for that frequency.  For example, if you are running DDR3-1333 (667MHz, or 1.5ns cycle time), then you would choose CL=9, CWL=7 (you could also choose CL=10 according to the table)

    5. Yes, you can change this to 170ns, although i think the difference will be negligible.  On the AM57x, you don't have the choice to specify that delay, but you specify each microstrip vs. stripline length.  

    Regards,

    James