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[TDA UDMA]Questions about UDMA?

lance
Intellectual 500 points

Hi all,

I have the following questions about UDMA:

  1. Can we use UDMA to transfer data between DDR and L2SRAM? I have changed the location of destBuf from DDR to L2SRAM in the example "udma_memcpy_test", but the program executed failed on C66 DSP.
  2. Can we attach different events to different TRPDs in one channel? If 'No', when we have several TR tasks to sync, do we have to establish several channesl? I have profiled the process of establishing a UDMA channel, it takes very many cycles. What should we do in the situation of syncing a lot of TR tasks?
  3. I have profiled the speed of transfering data in a Normal channel and a DRU channel in C66 DSP. Their speed difference is very large, probably about 10 times. When to use Normal Channel and when to use DRU Channel,.
  4. If we don't attach any ring to a DRU channel, can we submit several TRPD to the DRU channel at the same time?
  5. When we test the UDMA examples,I found that when I set different L2 cache size, the transfer speed of UDMA varies greatly. Whether it is Normal channel or  DRU channel. For example, when I transmit 1000 bytes, the number of cycles consumed can be more than doubled. I want to know how much the size of the L2Cache is more suitable. Can you please provide any suggestions on C66 programming? How large should we set L2 as cache or SRAM.

THX a lot!!!

  • 0
    TI__Expert 4935 points

    1. This is because the physical and virtual memory for L2RAM is different on C66x. Refer Udma_appVirtToPhyFxn and Udma_appPhyToVirtFxn function in udma\examples\udma_apputils\udma_apputils.c. This does the conversion. And any address that you provide to UDMA (ring memory, TRPD, src/dest buffer) should be converted to physical address before providing. Kindly refer to testcases in UDMA unit test application using "UTILS_MEM_HEAP_ID_INTERNAL" in folder udma\unit_test\udma_ut

    2. This is not possible. You have to use multiple channels. See the UDMA chaining example on how to use the UDMA API.

    3. DRU channels are designed to use the maximum bandwidth and it will be do the data transfer at the maximum speed. This means it could block other transfers in the system. When to use normal/DRU depends on your usecase and how you schedule the various data transfer in your system

    4. As per spec, a single DRU channel can take up to 2 requests. But this is not verified by SW. I suggest you submit one TR at a time and do the queuing in the SW.

    5. Same as 3. L2RAM/Cache speed is designed to be faster than DDR similar to DRU and normal channel. So code execution will also be faster. Chose and partition based on your usecase.

  • 0 in reply to Sivaraj R3681
    Intellectual 500 points

    Thank you very much!

    BTW，When I use DRU UDMA to Warm Cache. The speed is much slower than MemCopy. What should I notice when I want to warm cache. Could you please provide any examples?

    Lance

  • 0 in reply to Sivaraj R3681
    Intellectual 500 points

    Thank you very much!

    BTW，When I use DRU UDMA to Warm Cache. The speed is much slower than MemCopy. What should I notice when I want to warm cache. Could you please provide any examples?

    Lance

  • 0 in reply to lance
    TI__Expert 4935 points

    As I mentioned in the another thread, we don't have an example to demonstrate Cache warming.