Part Number: TMS320C6657
What we drew the DDR circuit of tms320c6657 is shown in the attachment. The MPN of DDR3 is micron mt41k64m16tw-107, and the DDR rate is configured at 800mt / s. At present, the products using this circuit have been shipped in batches. Recently, we returned 3pcs PCBA (two batches). Fault phenomenon: after PCBA is powered on, the DDR self-test sometimes passes, sometimes fails. When DDR test fails, the contents of low bytes read and written in The content is inconsistent and the high byte is read and written correctly. We ruled out the problems of welding, power supply and DSP power on timing. Later, after further testing, we found that after welding 100 Ω resistor at r531 position in the figure below, the phenomenon of DDR self-test failure disappeared. If r531 does not weld 100 Ω resistor, the phenomenon of DDR self-test failure will appear again. We suspect that it may be related to timing, so we are not in R 531 solder 100 Ω resistor, but try to modify the parameter configuration of DDR refresh, Cl, CWL, ODT, etc., and modify the DDR transmission rate, but DDR self-test still fails.
Please help to analyze:
1. Why can welding 100 Ω resistance DDR in r531 get up and get rid of it?
2. If r531 is not welded, can the same effect be achieved by configuring DDR controller parameters? What parameters need to be configured?
