J7 A72-RTOS configuration

Hi Gokul,

Yes, this is validated. You can refer to the IPC test example and this does exactly what you are looking for.

Regards

Karthik

Gokul,

You need to run the codes in no-boot mode, and binaries should be loaded through CCS.

If using 'ex02_bios_multicore_echo_test' then no change in  source-code required. It will print in SysMin buffer.

If you want to see print in CCS console then do following change in file

pdk/package/ti/drv/ipc/examples/common/j721e/ipc_override.cfg and then rebuild.

Line#38

if(0) //(coreId == "mpu1_0")
{
     SysMin.bufSize = 0x80000;
}
else
{
    var SysStd = xdc.useModule('xdc.runtime.SysStd');
    System.SupportProxy = SysStd;
}

Steps to run:

1) set board in no-boot mode
BOOT/MCU Switch
[0-7] --> 10001000
[2-9] --> 01110000

2) Modify the launch.js to match pdk root directory
<psdkra_root>/pdk/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/launch.js
pdkPath = "/home/sjha/psdk_rtos_auto_j7_06_01_00_15/pdk";

Line#134, please check:
dsDMSC_0.expression.evaluate("J7ES_LPDDR4_4266MTs_Config_Late()");

3) Save the file

3) Launch CCS, and launch target configuration for J7ES_SVB_XDS560v2_USB

4) open CCS 'Scripting Console' (Menu View -> Scripting Console)

5) Power ON the evm

6) loadJSFile("/home/sjha/psdk_rtos_auto_j7_06_01_00_15/pdk/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/launch.js")

7) Once completed, manually connect, load the binary and run.

Gokul,

"How to build the IPC examples ?"

<psdk_rtos_auto_j7_06_01_00_15>/pdk/packages/ti/build$ make -s -j ex02_bios_multicore_echo_test CORE=mpu1_0

This will build for A72 bios.  You can use mcu1_0, mcu1_1, mcu2_0, mcu_1, mcu3_0, mcu3_1, c66xdsp_1, c66xdsp_2, c7x_1 to build the binaries for other cores.

"Where will be default binary stored ex02_bios_multicore_echo_test'?"

The binaries will be stores at:

<psdk_rtos_auto_j7_06_01_00_15>/pdk/packages/ti/binary/ex02_bios_multicore_echo_test/bin/j721e_evm

"Can i load this binary in any core ?" 

You can build the binaries for each cores with parameter CORE=<corename> and then load corresponding binaries using CCS. The corenames are shown above.

"Is it mentioned in any documents ?"

pdk user's guide should explain the build steps for all low-level drivers. For ipc/lld build steps, refer to ipc/lld section.

"do we need to modify this line 

dsDMSC_0.expression.evaluate("J7ES_LPDDR4_4266MTs_Config_Late()");"

You may not need this change if the gel file is already updated.