Hi,
I hava a problem with a UART1 in a OMAP3530. I configured it according to documentation except one thing - in a UM "17.4.2.3 FIFO Polled Mode Operation" it is written that the FIFO_EN bit in FCR_REG should be 0 when interrupts aren't used to manage the FIFO. But I noticed that the TX FIFO isn't working correctly when FIFO_EN == 0.
When FIFO_EN == 1 I can do this:
for(i=0;i<6;i++)
{
UART1_THR_REG = Preamble[i];
}
And data is sent correctly. But when FIFO_EN == 0 I have to send the data like this:
for(i=0;i<6;i++)
{
while(!(UART1_LSR_REG & (1<<5)));//TX_FIFO_E - Transmit hold register (TX FIFO) is not empty
UART1_THR_REG = Preamble[i];
}
Because without checking TX_FIFO_E flag the data is sent corrupted.
But this is not a problem. The problem is that RX FIFO isn't working correctly. I use baudrate 921,6Kbps.
When I send single bytes to the OMAP with the speed of writting on the keyboard then received bytes are ok. But when I paste longer text then 1 character (or send more then 1 byte from other program) then data is corrupted.
When I send to omap "2222222222222222" I get "2’&’&’&’&’ć" - it looks like wrong baudrate, but transmitting from the OMAP is ok.
When can cause this problem?
My data receive function:
int egetc(char xNoLatch)
{
while(!(UART1_LSR_REG & (1<<0)));
return UART1_RHR_REG;
}
My UART configuration:
void EthernetInit(int xMode)
{
//Clock and gpio configuration...
//....
Register8Set(&UART1_SYSC_REG, 1, 1, 1);//Reset Uart1
while(!(UART1_SYSS_REG & 0x01));//wait for reset end
Register8Set(&UART1_SYSC_REG, 1, 2, 3);//no idle
Register8Set(&UART1_WER_REG, 0, 8, 0);//no wake up
Register8Set(&UART1_LCR_REG, 0xBF, 8, 0);//Set Configuration_mode_B
Register8Set(&UART1_EFR_REG, 1, 1, 4);//Enable register submode TCR_TLR
Register8Set(&UART1_LCR_REG, 0x80, 8, 0);//Switch to register configuration mode A
Register8Set(&UART1_MCR_REG, 1, 1, 6);//Enable register submode TCR_TLR
//FCR reg is not readable
Register8Set(&UART1_FCR_REG, (3<<1 | 1<<0), 8, 0);//clear TX i RX fifo i fifo enable
Register8Set(&UART1_LCR_REG, 0xBF, 8, 0);//Set Configuration_mode_B
Register8Set(&UART1_TLR_REG, 0, 4, 4);//Receive FIFO trigger level: patrz RX_FIFO_TRIG
Register8Set(&UART1_TLR_REG, 0, 4, 0);//Transmit FIFO trigger level: patrz RX_FIFO_TRIG
Register8Set(&UART1_SCR_REG, 0, 1, 7);//Disables the granularity of 1 for TRIGGER RX level
Register8Set(&UART1_SCR_REG, 0, 1, 6);//Disables the granularity of 1 for TRIGGER TX level
//No DMA settings
Register8Set(&UART1_EFR_REG, 0, 1, 4);//disable register submode TCR_TLR
Register8Set(&UART1_LCR_REG, 0x80, 8, 0);//Switch to register configuration mode A
Register8Set(&UART1_MCR_REG, 0, 1, 6);//disable access to the TCR_REG and TLR_REG registers
Register8Set(&UART1_MCR_REG, 0, 1, 4);//No loopback mode
//Register8Set(&UART1_MCR_REG, 1, 1, 4);//loopback mode
Register8Set(&UART1_LCR_REG, 0, 1, 7);//operation mode
Register8Set(&UART1_LCR_REG, 3, 2, 0);//8 bit character mode
//baudrate
Register8Set(&UART1_MDR1_REG, 7, 3, 0);//disable uart
Register8Set(&UART1_LCR_REG, 0xBF, 8, 0);//Set Configuration_mode_B
Register8Set(&UART1_EFR_REG, 1, 1, 4);//Enable access to IER_REG
Register8Set(&UART1_LCR_REG, 0, 8, 0);//Switch to register operation mode
Register8Set(&UART1_IER_REG, 0, 8, 0);//clear IER
Register8Set(&UART1_LCR_REG, 0xBF, 8, 0);//Set Configuration_mode_B
Register8Set(&UART1_DLL_REG, 4, 8, 0);//divisor low; Baudrate 921,6Kbps
Register8Set(&UART1_DLH_REG, 0, 6, 0);//divisor high; Baudrate 921,6Kbps
Register8Set(&UART1_LCR_REG, 0, 8, 0);//Switch to register operation mode
Register8Set(&UART1_LCR_REG, 0xBF, 8, 0);//Set Configuration_mode_B
Register8Set(&UART1_EFR_REG, 0, 1, 4);//restore EFR
Register8Set(&UART1_LCR_REG, 0, 1, 7);//operation mode
Register8Set(&UART1_LCR_REG, 3, 2, 0);//8 bit character mode
Register8Set(&UART1_MDR1_REG, 3, 3, 0);//uart 13x probe
}
I run my programs without an operation system - just uboot.
Best regards
Thomas
