• State TI Thinks Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 100 subscribers
  • Views 591 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320C6747: Parallel NOR Flash Booting Process

Ambati Jameelu
Prodigy 160 points

Part Number: TMS320C6747

Hi,

Now i am working on parallel nor flash interface with TMS320C6747 processor ,in this process i have generated a .bin file by using AIS gen tool and loaded that file into NOR flash.

My problem is up to 32KB .bin file size writing into flash and boot up from flash fine,If file size exceeds more than 32KB by managing higher address lines writing successfully but not going to boot up from flash.

1)What is the Parallel NOR Flash Booting procedure?

2)What should i do for more than 32KB files Booting?

3)What is Secondary boot loader and where should i modify for user requirement?

  • 0
    TI__Mastermind 27355 points

    Hello,

    Please refer to Using the TMS320C6747/45/43 Bootloader for details on booting procedure.

    There was some discussion in the past regarding booting more than 32KB from NOR flash:

    https://e2e.ti.com/support/processors/f/791/t/474804?NOR-Direct-boot-custom-board-OMAP-L-137

    You will need to use GPIO lines for the EMIFA upper address lines. I'm checking if we have any more detailed information or examples to provide. I will post a reply here once I have more information.

    Regards,
    Sahin

  • 0 in reply to Sahin Okur
    Prodigy 160 points

    Hi,

    How to create ubl file for my requirement and how can i include that into my project. and how can i manage higher address lines to access more than 32KB.

  • 0 in reply to Sahin Okur
    Prodigy 160 points

    Hello,

    Please help us for this requirement ,how can i boot up the code more than 32KB.

  • 0 in reply to Ambati Jameelu
    TI__Mastermind 27355 points

    Hello,

    I apologize for the delay, our boot expert is currently out of office. We should have a response for you some time next week.

    Regards,
    Sahin

  • 0 in reply to Ambati Jameelu
    TI__Guru** 116840 points

    Ambati,

    It appears that you are using AIS NOR boot as described in the section 3.1.3 of the document here:

    http://www.ti.com/lit/an/sprabb1c/sprabb1c.pdf

    The direct mapped address for each chip select has a range of 32 MB as far as I can tell from the data sheet so there is no reason why the ROM should hang at 32 KB size.  How did you confirm that the image written to NOR flash is correct ? 

    Also, indicate the value of Program counter when you connect to the DSP after the boot fails with image size >32 KB. If possible load the GEL file attached and proivde us the log so we can understand the SOC and ROM status when the image fails to load on the DSP.

    3034.OMAPL1x_debug.gel 

    Secondary bootloaders are basically user defined application boot code that execute from device RAM and loads the application. The ROM bootloader code on the device loads the secondary bootloader code and passes control to it. The secondary bootloader will then initialize the SOC as per application requirement and then load and run the application.

    We provide example secondary bootloader in our Processor SDK RTOS software package as an example to use as a starting point.

    Regards,

    Rahul

    PS: If possible, try to provide the part number of the parallel NOR that you are using and check if 32 KB Is the sector size and check the code that writes more than 32 KB to ensure that it is not over writing the code in the first sector  when image size >32 KB.