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[TDA4VM] C66x RAT configuration

Ming Zhong10
Intellectual 2235 points

Dear experts,

Since C66xDSP is a 32bit core, and a RAT is used for address conversion.

I'm using PSDKRA & PSDKLA 1.0 version. Where is the c66xdsp RAT configuration?

Background: I want to use c66xdsp to read some register out of default memory map.

Thanks & Best Regards!

ZM

  • 0
    TI__Expert 5565 points

    Does section 8.4 and Table 2.6 of the TRM answer your question? 

    In the SDK, you can refer to a couple of examples to get an idea of how to program the C66 RAT

    1. pdk/packages/ti/csl/test/core-r5/core_r5_rat_test.c uses csl for R5F rat.  You can change the region to use CSL_C66_COREPAC_C66_RATCFG_BASE instead of the RF5 base.  This is defined in the following file: pdk/packages/ti/csl/soc/j721e/src/cslr_soc_c66_baseaddress.h

    2. pdk/packages/ti/osal/test/src/main_osal_test.c uses hard coding for C66 rat (not using driver).

    I don't think there is a default configuration otherwise as we haven't had to program the RAT in our C66 demos.

    I hope this helps.  Please let me know.

    Jesse

  • 0 in reply to Jesse Villarreal
    TI__Intellectual 2235 points

    Thanks Jesse.

    Another API is found. function "Board_setC66xRATCfg" in pdk can do the configuration.

    We need to manually configure the register to do the mapping.