[TDA4] Question about UDMA transfer

lei fu1

Other Parts Discussed in Thread: DRA829, TDA4VM

Hello There,

Regarding TDA4 UDMA, I have following questions. Could you please help us figure them out. Much Appreciate!

1. The physical address of C71x L1 and L2? Currently the time of UDMA DDR->L2 is same as DDR->MSMC;

2. How many channels in UDMA can parallel run? which means can DDR->MSMC can parallel with MSMC->DDR in different UDMA channels? also DDR-addr0->MSMC-addr0 can parallel run with DDR-addr1->MSMC-addr1? Base on DRU description, There are 5 different queues with a split arbitration between fixed priority and round robin arbitration. i think 5 udma channel can parallel run?

3. we have a case to call MMA CONV. input data in DDR, Since C71X SE(Stream Engine) only can read data from L2 according to J721E_DRA829_TDA4VM_AM752x_xxx documents, what's the efficiency way for the data flow?

a. use DMA move Data from DDR to MSMC, and use L2 cache do the following ops?

b. use DMA move data from DDR to L2, and do the following ops?

Thanks a lot!

Best Regards,

Samuel

over 5 years ago

0 Sivaraj R3681 over 5 years ago

TI__Expert 4935 points

1. L2RAM of C7x is from 0x64800000 and L1 is from 0x64E00000. The performance is same probably because the DDR could be the bottle neck

2. All UDMA channels transfers can be initiated simultaneously as long as the memories don't overlap. The UDMA will interleave the transfer.

3. I will notify my team member to answer this.

I suggest you create multiple E2E threads for different questions so that it is easy for TI to assign to the right expert. Thanks for understanding

0 kumar.desappan over 5 years ago in reply to Sivaraj R3681

TI__Mastermind 22145 points

on 3. The most optimal way is use DMA to move data from DDR to L2, and do the op.

BTW, SE can access data from MSMC or DDR as well.

0 lei fu1 over 5 years ago in reply to Sivaraj R3681

Expert 1640 points

Thanks a lot for the reply!

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[TDA4] Question about UDMA transfer