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AM3352: OSC0 crystal drive level

Part Number: AM3352

I am using a 24MHz crystal for OSC0 and have connected the circuit as shown in the AM3352 Datasheet (SPRS717K) Figure 6-9. My crystal complies with the requirements of Table 6-2 i.e

CL = 18pF

Cshunt = 5pF

ESR = 40R

Drive level = 500uW max

When I measure the crystal drive level it is >600uW so I need to add the optional resistor Rd with a value of 120R to reduce it. The effective ESR of my crystal is now 160R. My question is, could this value of ESR reduce the gain margin and prevent the oscillator starting?   Is it the case that, to ensure sufficient gain margin to guarantee oscillation, my effective ESR (160R) must be less than the oscillator worst case negative resistance (144R) specified in Table 6-2?

Many thanks in advance for any assistance,

Graham

  • Let me discuss your question with our oscillator experts.

    Regards,
    Paul

  • Can you describe how you measured the crystal drive level?  Power dissipated in the crystal is calculated with the following formula.

    Pxtal = 0.5 ESR (2 π ƒxtal CL VDDS_OSC)2

    This formula can be found in the Pxtal parameter defined in Table 6-3 (OSC0 Crystal Circuit Characteristics) of the AM335x data sheet. The voltage applied to VDDS_OSC was used in this formula since it is the largest voltage that can be sourced to the crystal circuit. In some cases the oscillator output may never reach this potential when driving the crystal circuit. If so, the actual power dissipated in the crystal would be lower than the value produced by this formula.

    I calculate a power dissipation of 477uW when using the crystal parameters you provided and 1.8V for VDDS_OSC.

    The voltage applied to the crystal circuit could be reduced by increasing the value of Rd which creates a voltage divider with Rd being placed in series with the resonate impedance of the crystal circuit which should be about 40 ohms. So inserting a 5 ohm resistor for Rd would reduce the power dissipation of the crystal to about 377uW. 

    Therefore, you should not need to a Rd value as large as 120 ohms.

    Regards,
    Paul

  • Your analysis makes good sense and I would be happy to leave Rd at 0 ohms and go with the max drive level of 477uW.

    But I'm still struggling to understand my drive level measurement which comes out higher than 477uW, using the following method: I measured the crystal drive current with a current probe - I've lifted one side of the crystal, soldered a short wire link from PCB pad to crystal pin and clamped the current probe around the wire link. The reading is 3.93mArms. I then use

    Pxtal = ESR (Ixtal)2

    to arrive at 618uW for the drive level (ESR = 40 ohms)

    I also measured the voltages either side of the crystal using a 1pF active probe, I see 2.9Vpp (sinusoidal) on OSC_IN and 2.2Vpp (distorted) on OSC_OUT... so that doesn't make much sense either i.e greater than 1.8V VDSS_OSC. I see similar levels on the Beagle Bone Black board, using the same measurement technique.

    Please let me know if you can see a flaw in my method!

    Thanks

    Graham

  • It sounds like something is wrong with you measurements. I have probed many crystal circuits in the past and never saw a potential greater than VDD.

     

    Have you confirmed your design is sourcing the correct supply voltage to the oscillator?

     

    Regards,

    Paul

  • I double-checked the supply to VDDS_OSC - it measures 1.8V and comes from a PMIC LDO that defaults to 1.8V and does not have a higher setting, so that looks OK.

    I've also double-checked everything else and can't see anything that explains my excessive OSC0 signal levels.

    Do you have access to a Beagle Bone Black board?   It would be interesting to compare my measurements from the Beagle Bone Black OSC0 with yours, recall that I measure the same high levels on the BBB as on my own board. 

    Other than that, I guess this will remain a mystery until I can think of something else that may be going wrong!

    Thanks

    Graham