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TMS320C6747: TMS320C6747B, TMS320C6747D

lionel langer
Prodigy 20 points
Part Number: TMS320C6747


Hello to you,

I'm using a TMS320C6747BZKBA3 in my design but this part is obsolete the TMS320C6747DZKBA3 is recommended to replace it.Please could you inform me what are all the differences between the two components?

What need to be change if the frequency is 375Mhz for the TMS320C6747DZKBA3 vs 300Mhz in the TMS320C6747BZKBA3 - input oscillator, PLL registers, etc ?

Thank you for your good cooperation.

Regards.

Langer Lionel

  • 0
    TI__Mastermind 27355 points

    Hello,

    The "B" and "D" in C6747B and C6747D are the device revision codes and denote the silicon revision. 

    D denotes silicon revision 3.0.

    B denotes silicon revision 2.0.

    Please refer to the C6747 Silicon Errata for details on the differences. 

    Regards,
    Sahin

  • 0 in reply to Sahin Okur
    Prodigy 20 points

    Hello Sahin,

    I didn't understand the errata and I'd like to know about the input clock. If I work with a clock between 20 to 30 Mhz and the frequencies for the components are 300Mhz for B revision and 375Mhz for D revision so did I need to change the input oscillator or there are PLL registers that provide those frequencies. If there are registers please advise/

    Thank you.

    Regards.

    Langer Lionel

     

  • 0 in reply to lionel langer
    TI__Mastermind 27355 points

    The PLL registers can be modified to provide the frequencies. The following tool will help you with this. 

    Programming PLL Controllers on OMAP-L1x7/C674x/AM17xx/DA8xx

    You can also refer to the GEL file for the C6747 EVM which configures the PLL at 300MHz using a 24MHz input clock. It can be found in your CCS installation under \ccs_base\emulation\boards\evmc6747\gel\. I've also attached it below. Refer to the Setup_PLL() function specifically. 

    evmc6747_dsp.gel

    Hope this helps. Please let me know if you have any questions.

    Regards,
    Sahin

  • 0 in reply to lionel langer
    TI__Guru* 84565 points

    Langer

    Do note that in addition to Sahin's email on guidance on how to change the PLL settings to run at 375 MHz - there is no reason for you to change the frequency going from rev B silicon to rev D silicon. If your application/design requirement is to stay with 300 MHz - that is supported on the rev D, and you can carry forward your existing PLL settings you have on rev B to run the device at 300 MHz. 

    If you do need to bump up the frequency, you can leverage the collateral Sahin pointed to you.

    Hope this helps.

    Regards

    Mukul