Part Number: TMS320C6455
Hi
I'm working on a customized board contain FPGA and DSP(C6455), the only connection between DSP and FPGA is EMIF. Is it possible to Drive EMIF with below fetures:
My Idea is that FPGA can write in DSP memory without DSP core notify(like HPI), so I put a Dual Port RAM in FPGA , FPGA write the data in it and the out put port is connected to TI DSP EMIF pins.
It means that FPGA write in Dual Port RAM that is connected to DSP EMIF next FPGA trig the EDMA that initial before and data transfer from the Dual Port RAM to DSP RAM automatically without DSP Core notify.
Is it possible to initial the EDMA in DSP and trig it via FPGA? Is the above scenario possible? What is your suggestion?
Best Regards
