This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM5718: McASP configuration issue

Part Number: AM5718

Hi,

I am using AM5718 ,Iam trying to configure MCASP (1 and 2) in I2S mode by polling status register(without EDMA).I followed your APIs as per SitaraWare_Audio .(https://processors.wiki.ti.com/index.php/SitaraWare_Audio) .

  • McASPTxReset(SOC_MCASP_CFG_BASE);
  • McASPTxFmtI2SSet(SOC_MCASP_CFG_BASE, WORD_SIZE, SLOT_SIZE,
                                        MCASP_TX_MODE_DMA);

  • McASPTxFrameSyncCfg(SOC_MCASP_CFG_BASE, 2, MCASP_TX_FS_WIDTH_WORD,
                                               MCASP_TX_FS_EXT_BEGIN_ON_FALL_EDGE |
                                               MCASP_TX_FS_INTERNAL);

  • McASPTxClkCfg(SOC_MCASP_CFG_BASE, MCASP_TX_CLK_INTERNAL,((MCASP_ACLKX_CLKXDIV_VALUE &
                               MCASP_ACLKXCTL_CLKXDIV_MASK) >>
                                MCASP_ACLKXCTL_CLKXDIV_SHIFT),
                                ((MCASP_AHCLKX_HCLKXDIV_VALUE &
                                MCASP_AHCLKXCTL_HCLKXDIV_MASK) >>
                                MCASP_AHCLKXCTL_HCLKXDIV_SHIFT));

  • McASPTxClkPolaritySet(SOC_MCASP_CFG_BASE, MCASP_TX_CLK_POL_FALL_EDGE);
  • McASPTxTimeSlotSet(SOC_MCASP_CFG_BASE, I2S_SLOTS);
  • McASPSerializerTxSet(SOC_MCASP_CFG_BASE, MCASP_XSER_TX_0);
  • McASPSerializerTxSet(SOC_MCASP_CFG_BASE, MCASP_XSER_TX_1);
  • McASPPinMcASPSet(SOC_MCASP_CFG_BASE, (MCASP_PIN_AFSR |
                                         MCASP_PIN_ACLKR | MCASP_PIN_AFSX |
                                         MCASP_PIN_AHCLKX |
                                         MCASP_PIN_ACLKX |
                                         MCASP_PIN_AMUTE |
                                         MCASP_PIN_AXR(MCASP_XSER_TX_0) |
                                         MCASP_PIN_AXR(MCASP_XSER_TX_1)));

  • McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_AFSR);
  • McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_ACLKR);
  • McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_AFSX);
  • McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_AHCLKX);
  • McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_ACLKX);
  • McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_AXR(MCASP_XSER_TX_0));
  • McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_AXR(MCASP_XSER_TX_1));
  • McASPTxClkStart(SOC_MCASP_CFG_BASE, MCASP_TX_CLK_INTERNAL);
  • McASPTxClkCheckConfig(SOC_MCASP_CFG_BASE, MCASP_TX_CLKCHCK_DIV32,
                                                  0x00, 0xFF);

  • McASPTxSerActivate(SOC_MCASP_CFG_BASE);
  • McASPTxEnable(SOC_MCASP_CFG_BASE);
  • while (McASPTxStatusGet(SOC_MCASP_CFG_BASE) & MCASP_TX_STAT_DATAREADY);
  • McASPTxBufWrite(SOC_MCASP_CFG_BASE, MCASP_XSER_TX_0,
                                     0xAAAAA000);

I got both clock and frame sync.but code was hanged at the time of checking Tx Status ready and there was no output through serial data lines .

  • Hi Shan,

    Because you used EDMA for TX and you did not set up the EDMA for TX.

    McASPTxFmtI2SSet(SOC_MCASP_CFG_BASE, WORD_SIZE, SLOT_SIZE,
                                        MCASP_TX_MODE_DMA);

    Ming

  • Hi Ming Wei,

    I changed my configuration to non dma mode by changing MCASP_TX_MODE_DMA to MCASP_TX_MODE_NON_DMA. But  there was no change at  output(No output through data lines) and hanged at the same place.Current MCASP_TXSTAT register is


  • Hi Shan,

    For the transmitting loop, you should have done the following:

        while(1)
        {

            serailizerXmtStatus = McASPIsSerializerXmtReady(SOC_MCASP_CFG_BASE,MCASP_XSER_TX_0);
            if(serailizerXmtStatus)
            {
                McASPTxBufWrite(SOC_MCASP_CFG_BASE,MCASP_XSER_TX_0, 0xAAAA0000);
            }

        }

    Ming

  • Hi Ming Wei,

        I changed my code as per your suggestion.but no change at output.

            serailizerXmtStatus = McASPIsSerializerXmtReady(SOC_MCASP_CFG_BASE,MCASP_XSER_TX_0);

    Function McASPIsSerializerXmtReady always returns a zero,So there was no entry to the function 'McASPTxBufWrite'

  •  Hi Shan,

    Because you said the program execution passed the following code:

    while (McASPTxStatusGet(SOC_MCASP_CFG_BASE) & MCASP_TX_STAT_DATAREADY);

    McASPTxBufWrite(SOC_MCASP_CFG_BASE, MCASP_XSER_TX_0, 0xAAAAA000);

    You should at least saw one 0xAAAAA000 on the data line. Are you sure you measured on the correct pin for MCASP_XSER_TX_0?

    Ming

  • Hi Ming wei,

    Yes, i verified  all pins once again.I was generated it using pin mux tool.boardPadDelay.h

    /**
     * Note: This file was auto-generated by TI PinMux on 1/18/2020 at 4:53:43 AM.
     *
     * \file  boardPadDelayDevice.c
     *
     * \brief   This file contain run time configuration based on devices connected to SOC interfaces.
     *
     * \copyright Copyright (CU) 2015-2018 Texas Instruments Incorporated - 
     *             http://www.ti.com/
     */
    
    /**
     *  Redistribution and use in source and binary forms, with or without
     *  modification, are permitted provided that the following conditions
     *  are met:
     *
     *    Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     *    Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the
     *    distribution.
     *
     *    Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
     *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
     *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     */
     
    #include <stdio.h>
    #include <stdint.h>
    #include "boardPadDelay.h"
    
    
    /* Table containing the MMC pad to mode mapping for MMC1 instance. */
    mmcBoardPadCfgTable_t gMmc1PinmuxTable[] =
    {
        { MMC1_DEFAULT_PLB, NULL, 0 },
        /**< Pad configuration for Default Pad Loopback mode of MMC1. */
        { MMC1_HS_ILB, NULL, 0 },
        /**< Pad configuration for High speed Internal Loopback mode of MMC1. */
        { MMC1_HS_PLB, NULL, 0 },
        /**< Pad configuration for High speed Pad Loopback mode of MMC1. */
        { MMC1_SDR12_PLB, NULL, 0 },
        /**< Pad configuration for SDR12 Pad Loopback mode of MMC1. */
        { MMC1_SDR12_ILB, NULL, 0 },
        /**< Pad configuration for SDR12 Internal Loopback mode of MMC1. */
        { MMC1_SDR25_ILB, NULL, 0 },
        /**< Pad configuration for SDR25 Internal Loopback mode of MMC1. */
        { MMC1_SDR50_ILB, NULL, 0 },
        /**< Pad configuration for SDR50 Internal Loopback mode of MMC1. */
        { MMC1_SDR50_PLB, NULL, 0 },
        /**< Pad configuration for SDR50 Pad Loopback mode of MMC1. */
        { MMC1_DS_ILB, NULL, 0 },
        /**< Pad configuration for Default speed Internal Loopback mode of MMC1. */
        { MMC1_DDR50_ILB, NULL, 0 },
        /**< Pad configuration for DDR50 Internal Loopback mode of MMC1. */
        { MMC1_DDR50_PLB, NULL, 0 },
        /**< Pad configuration for DDR50 Pad Loopback mode of MMC1. */
        { MMC1_SDR104, NULL, 0 },
        /**< Pad configuration for SDR104 mode of MMC1. */
        { MMC_MODE_INVALID, NULL, 0 }
        /**< Invalid MMC Mode */
    };
    
    /* Table containing the MMC pad to mode mapping for MMC2 instance. */
    mmcBoardPadCfgTable_t gMmc2PinmuxTable[] =
    {
        { MMC2_DEFAULT_HS_PLB, NULL, 0 },
        /**< Pad configuration for Default High Speed Pad Loopback mode of MMC2. */
        { MMC2_DEFAULT_STD_PLB, NULL, 0 },
        /**< Pad configuration for Default Standard Pad Loopback mode of MMC2. */
        { MMC2_DDR_PLB, NULL, 0 },
        /**< Pad configuration for DDR Pad Loopback mode of MMC2. */
        { MMC2_DDR_ILB, NULL, 0 },
        /**< Pad configuration for DDR Internal Loopback Manual mode of MMC2. */
        { MMC2_HS200, NULL, 0 },
        /**< Pad configuration for HS200 mode of MMC2. */
        { MMC2_STD_ILB, NULL, 0 },
        /**< Pad configuration for Standard Internal Loopback mode of MMC2. */
        { MMC2_HS_ILB, NULL, 0 },
        /**< Pad configuration for High speed Internal Loopback mode of MMC2. */
        { MMC_MODE_INVALID, NULL, 0 }
        /**< Invalid MMC Mode */
    };
    
    /* Table containing the MMC pad to mode mapping for MMC3 instance. */
    mmcBoardPadCfgTable_t gMmc3PinmuxTable[] =
    {
        { MMC3_DEFAULT, NULL, 0 },
        /**< Pad configuration for Default speed mode of MMC3. */
        { MMC3_HS, NULL, 0 },
        /**< Pad configuration for High speed mode of MMC3. */
        { MMC3_SDR12, NULL, 0 },
        /**< Pad configuration for SDR12 mode of MMC3. */
        { MMC3_SDR25, NULL, 0 },
        /**< Pad configuration for SDR25 mode of MMC3. */
        { MMC3_SDR50, NULL, 0 },
        /**< Pad configuration for SDR50 mode of MMC3. */
        { MMC_MODE_INVALID, NULL, 0 }
        /**< Invalid MMC Mode */
    };
    
    /* Table containing the MMC pad to mode mapping for MMC4 instance. */
    mmcBoardPadCfgTable_t gMmc4PinmuxTable[] =
    {
        { MMC4_DEFAULT, NULL, 0 },
        /**< Pad configuration for Default speed mode of MMC4. */
        { MMC4_HS, NULL, 0 },
        /**< Pad configuration for High speed mode of MMC4. */
        { MMC4_SDR12, NULL, 0 },
        /**< Pad configuration for SDR12 mode of MMC4. */
        { MMC4_SDR25, NULL, 0 },
        /**< Pad configuration for SDR25 mode of MMC4. */
        { MMC_MODE_INVALID, NULL, 0 }
        /**< Invalid MMC Mode */
    };
    
    /* Look up Table containing the list of all Pad configuration structures for
       different operating modes defined for an instance of the MMC device. */
    mmcBoardPadCfgTable_t* gMmcPadConfigTable[] =
    {
        gMmc1PinmuxTable,
        /**< Pointer to the Pad configuration structure of MMC1 instance. */
        gMmc2PinmuxTable,
        /**< Pointer to the Pad configuration structure of MMC2 instance. */
        gMmc3PinmuxTable,
        /**< Pointer to the Pad configuration structure of MMC3 instance. */
        gMmc4PinmuxTable
        /**< Pointer to the Pad configuration structure of MMC4 instance. */
    };
    
    mmcBoardPadCfgTable_t* BoardGetMmcCtrlPadPinmuxTable(uint32_t instance)
    {
        return (gMmcPadConfigTable[instance]);
    }
    
    /**
     * Note: This file was auto-generated by TI PinMux on 1/18/2020 at 4:53:46 AM.
     *
     * \file  boardPadDelayInit.c
     *
     * \brief   This file contain manual/vritual iodelay mode definitions
     *
     * \copyright Copyright (CU) 2015-2018 Texas Instruments Incorporated - 
     *             http://www.ti.com/
     */
    
    /**
     *  Redistribution and use in source and binary forms, with or without
     *  modification, are permitted provided that the following conditions
     *  are met:
     *
     *    Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     *    Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the
     *    distribution.
     *
     *    Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
     *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
     *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     */
    
    #include <stdint.h>
    #include "boardPadDelay.h"
    #include "boardPadDelayTune.h"
    
    
    #if defined(_TMS320C6X) || defined(__TI_ARM_V7M4__)
    #ifndef __cplusplus
    #pragma DATA_SECTION (pad, "BOARD_IO_DELAY_DATA");
    #else
    #pragma DATA_SECTION ("BOARD_IO_DELAY_DATA");
    #endif
    const boardPadDelayCfg_t pad[] = {
    #else
    const boardPadDelayCfg_t pad[] __attribute__((section("BOARD_IO_DELAY_DATA"))) = {
    #endif
    /** {PADCONF_REG_OFFSET, PADCONF_VALUE, {CFG_X_IN offset, aDelay, gDelay}, {CFG_X_OEN offset, aDelay, gDelay}, {CFG_X_OUT offset, aDelay, gDelay}} **/
    
    /* MCASP1 - mcasp1_ahclkx on D18 - MyMCASP1 */
         {0x1694, 0x50003, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    
    /* MCASP1 - mcasp1_aclkx on C14 - MyMCASP1 */
    #ifdef MCASP1_DEFAULT
         {0x16A4, 0x50000, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    #endif
    
    /* MCASP1 - mcasp1_fsx on D14 - MyMCASP1 */
    #ifdef MCASP1_DEFAULT
         {0x16A8, 0xD0000, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    #endif
    
    /* MCASP1 - mcasp1_aclkr on B14 - MyMCASP1 */
    #ifdef MCASP1_DEFAULT
         {0x16AC, 0x50000, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    #endif
    
    /* MCASP1 - mcasp1_fsr on J14 - MyMCASP1 */
    #ifdef MCASP1_DEFAULT
         {0x16B0, 0x50000, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    #endif
    
    /* MCASP1 - mcasp1_axr0 on G12 - MyMCASP1 */
    #ifdef MCASP1_DEFAULT
         {0x16B4, 0xD0000, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    #endif
    };
    
    #ifdef __cplusplus
    #if defined(_TMS320C6X) || defined(__TI_ARM_V7M4__)
    #pragma CODE_SECTION ("BOARD_IO_DELAY_CODE");
    #endif
    #endif
    uint32_t boardPadGetSize()
    {
         return (sizeof(pad) / sizeof(boardPadDelayCfg_t));
    }
    
    #ifdef BOARD_PAD_DELAY_ALT_GRP_ENABLE
    #ifdef __cplusplus
    #if defined(_TMS320C6X) || defined(__TI_ARM_V7M4__)
    #pragma CODE_SECTION ("BOARD_IO_DELAY_CODE");
    #endif
    #endif
    uint32_t boardAltPadGetSize()
    {
         return (sizeof(altPad) / sizeof(boardPadDelayAltGpCfg_t));
    }
    #endif
    
    8233.boardPadDelayTune.h

    Ming Wei said:
    Because you said the program execution passed the following code:

    program execution always hanged at while loop(at the time of status check) that i mentioned in my previous post.

    There is a statement in your TRM.

    McASP1, McASP2, and McASP3, whose data ports are accessible directly via L3_MAIN do
    not support FIFO/constant addressing modes. Incrementing transfers must be used instead.


     

     

    What does it mean?? Can i able to transfer data through the buffer named 'MCASP_TXBUF' using MCASP1,2,3??

        Regards,

           Shan

  • Hi Shan,

    It  means you can access to the McASP 1/2/3 TX_BUF via MCASP_TXBUFn (n is the number of the serilizer). For example for MCASP1, 0x48460200 for serilizer 0 TX and 0x48460204 for serilizer 1 TX.. If you are using EDMA, you will need to use incremental   address mode for more than one serilizers.

    Because your MCASP_TXSTAT, XDATA bit is 1, it seems your MCASP is never ready for data transmitting. You may want to check your MCASP configuration. Please compare your code with the example code in C:\ti_am5_610\pdk_am57xx_1_0_16\packages\ti\csl\example\mcasp\mcasp_transmit\mcaspTransmit.c and C:\ti_am5_610\pdk_am57xx_1_0_16\packages\ti\board\diag\mcasp\src\mcasp_poll_test.c. In particular  BoardDiag_audioLoopbackTest().

    Ming

  • Hi Ming Wei,

    I successfully rebuilt McASP using your test code(mcasp_poll_test.c) and it's worked now. Thank you Ming Wei 

    Regards

    Shan Muhammad