SYSBIOS: AM335x GPIO interrupt configuration

I figured it out...  So I am answering, and posting this so anyone in the future can see how to simply set up GPIOs as inputs, outputs, and trigger an external interrupt...  While still using TI-TROS, tasks, and an HWI

The use of the Interrupt Vector table entries are not definable.  They have predefined intentions (I don't know why I forgot that).  The table is defined in the reference document "spruh73" , table 6-1.

The GPIOs are tied to interrupts [96, 97], [98, 99], [32, 33], [62, 63] for GPIO 0, 1, 2, and 3 respectively.

Two interrupts per register, apparently because there are two interrupt "buses", allowing the two cores to react to interrupts without conflicting with each other.

I gutted the CFG file of the ti.csl, ti.drv.gpio, ti.drv.uart, and  ti.drv.board  (while there is some doc on ti.sysbios, and ti.csl,  I can find nothing on ti.drv).  Doing that remove the bloat of the UART stuff, required GPIO_Config structure, and bunches of other overhead which is unexplained and (seems intentionally) obfuscated.  I even took out the ti.osal, since I can't find docs about what it does.

Then I had to manually link to the DAL and SOC libs in the starterware directories "starterware\binary\dal\lib\am335x-evm\a8\release\gcc" and "starterware\binary\soc\lib\am335x-evm\a8\release\gcc"

For posterity sake, I am posting my solution.  It has some comments. Also there is big block on the bottom that is #defined out. Originally  I could not find the equivalent functions in the PDK starterware libs, so I had to import them.  Then I found the actual SOC library call by just having to reverse engineer the PDK Starterware code (isn't the purpose of a library so you DON'T have to reverse engineer code to use it??  But again, no useful doc anywhere explaining any of these).  I left the code there in case someone else wants to examine it.

Anyone trying this code will have to insure they have the correct search paths for the includes.

The program is very simply.  Create a TI-RTOS task that flashes the built in LED on the BeagleBone board.  If a global is set, also turn on another LED, then turn if off on the next loop.  Because the task runs with 1/4 second delays, you can see when the flag is set and the LED lights, and I didn't have to worry about debounce.

It ties GPIO 1 bit 28 to an interrupt.  Then defines a hardware interrupt (HWI) to run when the interrupt occurs. That HWI will SET the global flag.

I didn't use any of the switches, instead the pin chosen is on the header P9, pin 12, so it could be jumpered out to something else in the real world.

(I edited some code in this post, as there are other functions which I was writing, but not related to solving this problem - if it doesn't compile, it should be easy to figure out)

/*
 *  ======== main.c ========
 */

#include <xdc/std.h>

#include <xdc/runtime/Error.h>
#include <xdc/runtime/System.h>

#include <ti/sysbios/BIOS.h>

#include <ti/sysbios/knl/Task.h>
#include <ti/sysbios/hal/Hwi.h>

/*   Starterware headers...  */
#include "gpio.h"        /* GPIO directions,  GPIOxxxxx(..)  functions */
#include "hw/soc_AM335x.h"      /*  Hardware addresses for this Sitara */
#include "hw/hw_types.h"       /* HWREG MACROS plus simple types (T/F, boolean, ..) */

#include <ti/csl/csl_utils.h>       /*  That CONST  */
#include <ti/starterware/include/prcm.h>       /*  Register Addresses of the AM335x  */
#include <ti/starterware/include/hw/soc_am335x.h>       /*  Register Addresses of the AM335x  */
#include <ti/starterware/include/am335x/hw_cm_per.h >


void ConfigureHardwareInterrupt();
//void GPIO1ModuleClkConfig(void);
//void GPIO2ModuleClkConfig(void);
/*
 *  ======== taskFxn ========
*/
int intFlag;
Void taskFxn(UArg a0, UArg a1) {


    do {
        GPIOPinWrite(SOC_GPIO_1_REGS,23,0);
        GPIOPinWrite(SOC_GPIO_1_REGS,24,1);
        Task_sleep(250);
        GPIOPinWrite(SOC_GPIO_1_REGS,24,0);

        if (intFlag) {
            GPIOPinWrite(SOC_GPIO_1_REGS,23,1);
            intFlag = 0;
        }
        Task_sleep(250);

    } while (1);

}

/*
 *  ======== main ========
 */
Int main() {
    Task_Handle task;
    Error_Block eb;
    ConfigureHardwareInterrupt();
    Error_init(&eb);
    task = Task_create(taskFxn, NULL, &eb);
    if (task == NULL) {

        BIOS_exit(0);
    }
    BIOS_start();    /* does not return */
    return(0);
}


Hwi_Handle myHwi;
Error_Block eb;
Void myHwiFxn(UArg arg);

void ConfigureHardwareInterrupt() {
    Error_init(&eb);

//    GPIO1ModuleClkConfig();  // Use when we couldn't find the way to init the module...
//    GPIOSetDirMode(SOC_GPIO_1_REGS,24,GPIO_DIRECTION_OUTPUT );

    PRCMModuleEnable(CHIPDB_MOD_ID_GPIO,1,0);   /*  from SOC lib */

    GPIOModuleEnable(SOC_GPIO_1_REGS,1);
//    GPIOModuleReset(SOC_GPIO_1_REGS);      // Whatever this is, it blocks and doesn't return

    GPIOSetDirMode(SOC_GPIO_1_REGS,24,GPIO_DIRECTION_OUTPUT );   //  The BBB LEDs
    GPIOSetDirMode(SOC_GPIO_1_REGS,23,GPIO_DIRECTION_OUTPUT );


   //    Define the Interrupt to be on GPIO1, BIT 28
    GPIOSetDirMode(SOC_GPIO_1_REGS,28,GPIO_DIRECTION_INPUT );
    GPIOSetIntrType(SOC_GPIO_1_REGS,28,GPIO_INTR_MASK_FALL_EDGE );
    GPIOIntrClear (SOC_GPIO_1_REGS,0,28);
    GPIOIntrEnable (SOC_GPIO_1_REGS,0,28);

    /*  This is a SYSBIOS HWI... We want to trip on the interrupt 96 from the vector table */
    myHwi = Hwi_create(98, myHwiFxn, NULL, &eb);
    if (myHwi == NULL) {
        System_abort("Hwi create failed");
    }
}


Void myHwiFxn(UArg arg) {
    /*  This SHOULD clear the interrupt flag so it doesn't re-enter.  */
    GPIOIntrClear (SOC_GPIO_1_REGS,0,28);
    /*  Here we CLEAR the triggered SYSBIOS HWI */
    Hwi_clearInterrupt(98);

    intFlag = 1;
}

#ifdef USE_MINE_NOT_THE_PDK
/**********************************************
 *  LIFTED FROM STARTERWARE - Because the ways to actually activate
 *  IO lines is so screwy, it was almost better to just grab the code
 *  and implement it myself
 ****************************************/

/*
** This function enables the L3 and L4_PER interface clocks.
** This also enables functional clocks of GPIO1 instance.
*/
void GPIO1ModuleClkConfig(void) {

    /* Writing to MODULEMODE field of CM_PER_GPIO1_CLKCTRL register. */
    HWREG(SOC_CM_PER_REGS + CM_PER_GPIO1_CLKCTRL) |=
          CM_PER_GPIO1_CLKCTRL_MODULEMODE_ENABLE;

    /* Waiting for MODULEMODE field to reflect the written value. */
    while(CM_PER_GPIO1_CLKCTRL_MODULEMODE_ENABLE !=
          (HWREG(SOC_CM_PER_REGS + CM_PER_GPIO1_CLKCTRL) &
           CM_PER_GPIO1_CLKCTRL_MODULEMODE));
    /*
    ** Writing to OPTFCLKEN_GPIO_1_GDBCLK bit in CM_PER_GPIO1_CLKCTRL
    ** register.
    */
    HWREG(SOC_CM_PER_REGS + CM_PER_GPIO1_CLKCTRL) |=
          CM_PER_GPIO1_CLKCTRL_OPTFCLKEN_GPIO_1_GDBCLK;

    /*
    ** Waiting for OPTFCLKEN_GPIO_1_GDBCLK bit to reflect the desired
    ** value.
    */
    while(CM_PER_GPIO1_CLKCTRL_OPTFCLKEN_GPIO_1_GDBCLK !=
          (HWREG(SOC_CM_PER_REGS + CM_PER_GPIO1_CLKCTRL) &
           CM_PER_GPIO1_CLKCTRL_OPTFCLKEN_GPIO_1_GDBCLK));

    /*
    ** Waiting for IDLEST field in CM_PER_GPIO1_CLKCTRL register to attain the
    ** desired value.
    */
    while((CM_PER_GPIO1_CLKCTRL_IDLEST_FUNC <<
           CM_PER_GPIO1_CLKCTRL_IDLEST_SHIFT) !=
           (HWREG(SOC_CM_PER_REGS + CM_PER_GPIO1_CLKCTRL) &
            CM_PER_GPIO1_CLKCTRL_IDLEST));

    /*
    ** Waiting for CLKACTIVITY_GPIO_1_GDBCLK bit in CM_PER_L4LS_CLKSTCTRL
    ** register to attain desired value.
    */
    while(CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_GPIO_1_GDBCLK !=
          (HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) &
           CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_GPIO_1_GDBCLK));
}


void GPIO2ModuleClkConfig(void)
{
    /*  All changes are to register 44E0 + the control offset of AC:  */

    /* Writing to MODULEMODE field of CM_PER_GPIO1_CLKCTRL register.
     * Bit 1 is enable the module  */
    HWREG(SOC_CM_PER_REGS + CM_PER_GPIO2_CLKCTRL) |=
          CM_PER_GPIO2_CLKCTRL_MODULEMODE_ENABLE;

    /* Waiting for MODULEMODE field to reflect the written value. */
    while(CM_PER_GPIO2_CLKCTRL_MODULEMODE_ENABLE !=
          (HWREG(SOC_CM_PER_REGS + CM_PER_GPIO2_CLKCTRL) &
           CM_PER_GPIO2_CLKCTRL_MODULEMODE));
    /*
    ** Writing to OPTFCLKEN_GPIO_1_GDBCLK bit in CM_PER_GPIO1_CLKCTRL
    ** register.
    ** Set Optional Functional Block Control (bit 18)
    */
    HWREG(SOC_CM_PER_REGS + CM_PER_GPIO2_CLKCTRL) |=
          CM_PER_GPIO2_CLKCTRL_OPTFCLKEN_GPIO_2_GDBCLK;

    /*
    ** Waiting for OPTFCLKEN_GPIO_1_GDBCLK bit to reflect the desired
    ** value.
    */
    while(CM_PER_GPIO2_CLKCTRL_OPTFCLKEN_GPIO_2_GDBCLK !=
          (HWREG(SOC_CM_PER_REGS + CM_PER_GPIO2_CLKCTRL) &
           CM_PER_GPIO2_CLKCTRL_OPTFCLKEN_GPIO_2_GDBCLK));

    /*
    ** Waiting for IDLEST field in CM_PER_GPIO1_CLKCTRL register to attain the
    ** desired value.
    ** Testing the mask of bits 16, 17 waiting for them to turn OFF
    */
    while((CM_PER_GPIO2_CLKCTRL_IDLEST_FUNC <<
           CM_PER_GPIO2_CLKCTRL_IDLEST_SHIFT) !=
           (HWREG(SOC_CM_PER_REGS + CM_PER_GPIO2_CLKCTRL) &
            CM_PER_GPIO2_CLKCTRL_IDLEST));

    /*
    ** Waiting for CLKACTIVITY_GPIO_1_GDBCLK bit in CM_PER_L4LS_CLKSTCTRL
    ** register to attain desired value.
    ** Testing the base plus offset 0 (Clock Status Ctrl)  bit 19
    ** is "GPIO 1 Clock is active"
    */
    while(CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_GPIO_2_GDBCLK !=
          (HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) &
           CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_GPIO_2_GDBCLK));
}


#endif

Hopefully this will help the next person in the future trying to make sense of these things.