Hi Experts:
At TDA4x schematic checklist request LPDDR4 reset signal add pull down resistor to ensure reset hold low during POR state.
But reference design E7 version add pull up resistor at LPDDR4 reset pin. (U11 pin T11)
It is conflict with schematic checklist. Could you please help us double check whether EVM design need optimize for LPDDR4 reset signal?
DNI R232 and place resistor at R228.
Best Regards!
Han Tao