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OMAPL138 power down options

nchukeg
Intellectual 380 points
Other Parts Discussed in Thread: OMAPL138

I was wondering if there is a large difference in power saving on OMAPL138 between:

1) DSP is put by ARM into Disable state, ARM puts itself into WFI, PRU disabled

2) DSP puts ARM into Disable state, PRU puts DSP into Disable state, PRU active

From the power saving tool it appears that the two provide virtually the same power savings and option 1 requires a lot less time.  Is this correct?

Thanks

  • 0
    TI__Expert 8785 points

    nchukeg said:
    1) DSP is put by ARM into Disable state, ARM puts itself into WFI, PRU disabled

    ARM: WFI
    DSP: Disable
    PRU: Disable

    nchukeg said:
    2) DSP puts ARM into Disable state, PRU puts DSP into Disable state, PRU active

    ARM: Disable
    DSP: Disable
    PRU: Active

     

    It looks like both scenario will result in relatively the same power.  In the second scenario if you are using both PRUs, you might see slightly (a few mW) of power increase.

    From both scenarios, it seems like the cores are not doing any processing.  Another option will be to go into deepsleep mode.  It would result in much lower power.  But this option really depends on the type of mechanism that you are using to wake up your device.  In deepsleep mode, you can only be woken up by the RTC Alarm or an external input.

    --Christina

  • 0 in reply to clam
    Intellectual 380 points

    Christina,

    Thank you for the response.

    A couple more questions on the topic.

    Does DSP place ARM into the Disable state before going into Deep-sleep mode?

    While in deep sleep, can the processor still provided GPIO controls such as outputs that enable power to RF logic?

    How long does it take to wake up from deep-sleep?

    Thank you

  • 0 in reply to nchukeg
    TI__Expert 8785 points

    nchukeg said:
    Does DSP place ARM into the Disable state before going into Deep-sleep mode?

    Deep sleep mode clock gates all cores and peripherals, meaning that the ARM and DSP cores will have no clock.  Since the clocks are stopped, it will freeze the state machine within the cores and peripherals.  When the device is woken up from deep sleep, the clocks will be supplied, and everything will resume from where it left off.

    nchukeg said:
    While in deep sleep, can the processor still provided GPIO controls such as outputs that enable power to RF logic?

    If you configure the GPIO as outputs before going into deep sleep, those output signals will still stay the same logic level during deep sleep.  For instance, if a GPIO pin is configured as logic high output before deepsleep, it will stay a logic high output during deepsleep.

    However, if you want to change the logic level during deepsleep, it will not be possible.  You will have to wake up the device again and reconfigure the GPIO peripheral.

    nchukeg said:
    How long does it take to wake up from deep-sleep?

    You can configure the time via SYSCFG1[DEEPSLEEP] register.  There is a field called SLEEPCOUNT, which will count the number of valid clock cycles before waking up the entire device. 

    More information can be found in Deep Sleep Section of the System Reference Guide.  It will include information on how to enter/exit deepsleep, as well as what is happening in the device during each step.

    --Christina