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6747 legacy NOR boot problems

I have the following issue for a customer.

"Thank you for the help. I make much more progress now. But I got a hardware question. It seems that after the reset, the DSP CPU does not copy the code from the flash (0x60000000) to the internal RAM (0x11800000).

But if I manually set the PINMUX registers, the PSC1 register for GPIO, and clear GP1[15], GP5[14], and GP5[12] pins, then I reset CPU. So the program counter is set to 0x00700000, and let it run. The CPU will copy the code from flash to the RAM, and start running as I expect.

Do you know why the CPU won’t copy the code when it is powered up"

Is all they need to worry about the following pins, at least to boot? - BOOT 0,1,2,3,7 which is GP5[0], GP5[1], GP5[2], GP5[3] and GP5[7] - anything else they really need to worry about?

Cheers

Calum

  • Yes it seems his boot pins are not set properly at reset. Use this debug GEL file to determine the boot mode that the device sees at reset:

    http://processors.wiki.ti.com/index.php/OMAP-L1x_Debug_Gel_Files

    Also you can scope out the BOOT pins on the board during reset to make sure they are all at the proper levels.

    Jeff

  •  Hi - we get the following file dump and error - any clue as to what may be the problem?

    C674X_0: Output:  ---------------------------------------------

    C674X_0: Output: |             Device Information            |

    C674X_0: Output: ---------------------------------------------

    C674X_0: Output: DEV_INFO_00 = 0x9B7DF02F

    C674X_0: Output: DEV_INFO_01 = 0x00000000

    C674X_0: Output: DEV_INFO_02 = 0x0000F359

    C674X_0: Output: DEV_INFO_03 = 0x00000002

    C674X_0: Output: DEV_INFO_04 = 0x00000000

    C674X_0: Output: DEV_INFO_05 = 0x000003E0

    C674X_0: Output: DEV_INFO_06 = 0x80200200

    C674X_0: Output: DEV_INFO_07-DEV_INFO_08-DEV_INFO_09-DEV_INFO_10-DEV_INFO_11-DEV_INFO_12 = 8-0-62617-2-27-2

    C674X_0: Output: DEV_INFO_13,DEV_INFO_14,DEV_INFO_15,DEV_INFO_16 = 0,0,0,12864

    C674X_0: Output: -----

    C674X_0: Output: DEV_INFO_17 = 0x00030003

    C674X_0: Output: DEV_INFO_18 = 0x00000000

    C674X_0: Output: DEV_INFO_19 =

    C674X_0: Output: 0

    C674X_0: Output: 0

    C674X_0: Output: 0

    C674X_0: Output: 0

    C674X_0: Output: 0

    C674X_0: Output: 

    C674X_0: Output: -----

    C674X_0: Output: DEV_INFO_20 = 0x30303864

    C674X_0: Output: DEV_INFO_21 = 0x3330306B

    C674X_0: Output: DEV_INFO_22 = 0x00000000

    C674X_0: Output: DEV_INFO_23 = 0x00000000

    C674X_0: Output: -----

    C674X_0: Output: DEV_INFO_24 = 0x0200201B

    C674X_0: Output: DEV_INFO_25 = 0x0800F499

    C674X_0: Output: DEV_INFO_06 = 0x80200200

    C674X_0: Output: DEV_INFO_26 = 0x64800000

    C674X_0: Output:  

    C674X_0: Output: ---------------------------------------------

    C674X_0: Output: |               BOOTROM Info                |

    C674X_0: Output: ---------------------------------------------

    C674X_0: Output: ROM ID: d800k003 

    C674X_0: Output: Silicon Revision 2.0

    C674X_0: Output: Boot Mode: NOR

    C674X_0: Output:  ROM Status Code: 0x00000005  Description:

    C674X_0: Output: Peripheral Open Failed

    C674X_0: Output:  Program Counter (PC) = 0x00712144

  • It read the boot pins correctly but it couldn't open the NOR flash. What if they reset the board at that point (with power still applied)? I dont understand why setting the BOOT pins as GPIOs would be helping.

    Jeff

  • Hi,

    Turns out they are using a flash that has more address pins than the 6747 has - they use GPIO for the upper address bits. There were no pull downs on the GPIO they were using, so the boot code was being loaded at the correct address but when the DSP was released from reset the upper address pins were a logic '1' due to the internal pull-ups in the DSP. The relocated the boot code and it all worked. They will rework the board to add the pull downs.

    Thanks for your help

    Calum