Hi,
The customer is referring to Figure 23 in SPRACI2A “AM65x/DRA80xM DDR Board Design and Layout”, since they will use three of DDR3Ls on their own board. They would like to confirm two items below.
A0 – A15 seem to be connected. “14” is correct ?
BA0 to BA2 are not connected. These should be connect ?
Regards,
Hideaki
