Other Parts Discussed in Thread: OMAPL138
Hi ,
I am trying to implement multiple timer interrupt. The application has been outsourced and is written for single interrupt - timer generation. I am not very proficient in embedded coding , so i am not understanding how it works.
I observed the following:
/************void main********************************/
void main(void)
{
ISTP = (unsigned int)intcVectorTable; //Address of interrupt vector table.
uint16_t *src = (uint16_t*) ADC_base_addr;
uint16_t *src3 = (uint16_t*)0x01800104;
EVMC6748_init(); //initialization of Processor PLL and PSC.
PINMUX_init(); //Selecting function for pins.
EMIFA_init(); //configuration of Chip-select pin.
*src = 0x9;
*src3 = 0x00000004; //selecting interrupt 4 in intmux reg
CLRBIT(CONVST->DIR ,GPIO_OUTPUT1); // for configuring GPIO pin as output
SPI_INIT();
SETBIT(CSR ,0x14000010); //Disable Global Interrupt
timer0();
SETBIT(IER,0x00000013); //enable INT4 as CPU interrupt
while(1)
{
if(flag==1)
{
SETBIT(CSR ,0x00000003); //Global Interrupt enable
flag=0;
}
}
}
//-----------------------------------------------------------------------------
// Timer registers
//-----------------------------------------------------------------------------
#define TIMER0_REG_BASE (0x01C20000)
#define TIMER1_REG_BASE (0x01C21000)
/**********************************timer0****************************************************************/
void timer0(void)
{
volatile uint32_t period,i;
double Fs= 2500; //1000 //Sampling Frequency
period = 1/(Fs*(double)0.00000004);
CLRBIT(TMR0->TCR,Dis_MODE); //Disabling the timer
for(i=0;i<1000;i++);
SETBIT(TMR0 ->TGCR,MODE); // 32-bit Unchained Mode
SETBIT(TMR0 ->TGCR,OUT_reset); //timer to bring out of reset
// SETBIT(TMR0 ->PRD12,T_PERIOD); //time period = 12 micro seconds
CLRBIT(TMR0 ->TCR,CLK_SOURCE);
TMR0 -> TIM12 &= 0x00000000;
//Internal clock source of clock 25MHZ
// SETBIT(TMR0 ->EMUMGT,0x00000001);
TMR0 ->PRD12=period;
SETBIT(TMR0->TCR,En_MODE); //Enabling the timer
SETBIT(TMR0 ->INTCTLSTAT,En_INTR); //Enabling timer 0 Interrupt
}
/*****************************************************************************************************************/
#ifndef TIMER_H_
#define TIMER_H_
#include "types.h"
typedef struct
{
volatile uint32_t REV; // 0x0000
volatile uint32_t EMUMGT; // 0x0004
volatile uint32_t GPINT_GPEN; // 0x0008
volatile uint32_t GPDATA_GPDIR; // 0x000C
volatile uint32_t TIM12; // 0x0010
volatile uint32_t TIM34; // 0x0014
volatile uint32_t PRD12; // 0x0018
volatile uint32_t PRD34; // 0x001C
volatile uint32_t TCR; // 0x0020
volatile uint32_t TGCR; // 0x0024
volatile uint32_t WDTCR; // 0x0028
volatile uint32_t RSVD0[2]; // 0x002C
volatile uint32_t REL12; // 0x0034
volatile uint32_t REL34; // 0x0038
volatile uint32_t CAP12; // 0x003C
volatile uint32_t CAP34; // 0x0040
volatile uint32_t INTCTLSTAT; // 0x0044
volatile uint32_t RSVD1[6]; // 0x0048
volatile uint32_t CMP0; // 0x0060
volatile uint32_t CMP1; // 0x0064
volatile uint32_t CMP2; // 0x0068
volatile uint32_t CMP3; // 0x006C
volatile uint32_t CMP4; // 0x0070
volatile uint32_t CMP5; // 0x0074
volatile uint32_t CMP6; // 0x0078
volatile uint32_t CMP7; // 0x007C
} timer_regs_t;
// define all the available timer peripherals for the processor.
#define TMR0 ((timer_regs_t *)TIMER0_REG_BASE)
#define TMR1 ((timer_regs_t *)TIMER1_REG_BASE)
#define tm
#define MODE 0x00000004
#define OUT_reset 0x00000001
#define T_PERIOD 0x00000250
#define CLK_SOURCE 0x00000100
#define En_MODE 0x00000080 //with reload register
#define Dis_MODE 0x000000C0
#define En_INTR 0x00000001
#define INTR_CK 0x00000002
void timer0(void);
#endif /* TIMER_H_ */
/********************************************************************************/
//#define GPIO_OUTPUT (0xC)
#define GPIO_OUTPUT1 (0x4)
#define GPIO_OUTPUT2 (0x8)
#define GPIO_INPUT (0x2)
#define OUTPUT_LOW (0x4)
#define OUTPUT_HIGH (0x4)
#define ADC_base_addr (0x64000000)
/****************************************************ISR timer0************************************/
interrupt void timer0_isr(void)
{
volatile uint16_t INPUT, ERROR_L;// ERROR_R;
volatile uint16_t ANTI_L, ANTI_R, DUMMY, SPEECH;
int LocalVar;
// Variables for ADC signals
volatile float var1,var2,var3,var4;
volatile uint16_t VAR1,VAR2,VAR3,VAR4;
SETBIT(CSR ,0x14000010); //Disable Global Interrupt
SETBIT(CONVST->CLR_DATA ,OUTPUT_LOW); // for setting output pin low
SETBIT(CONVST->SET_DATA ,OUTPUT_HIGH); // on rising edge conversion will start
while(CHKBIT(CONVST->IN_DATA,GPIO_INPUT)); // waiting for EOC to go low
flag=1;
tic++;
}
/***********************************************************init*******************************************************/
.global _intcVectorTable
.global _c_int00
.global _vector1
.global _vector2
.global _vector3
.global _timer0_isr
.global _vector5
.global _vector6
.global _vector7
.global _vector8
.global _vector9
.global _vector10
.global _vector11
; some symbols defined in other files.
.ref _c_int00
.ref _timer0_isr
; This is a macro that instantiates one entry in the interrupt service table.
VEC_ENTRY .macro addr
STW B0,*--B15
MVKL addr,B0
MVKH addr,B0
B B0
LDW *B15++,B0
NOP 2
NOP
NOP
.endm
; This is a dummy interrupt service routine used to initialize the IST.
_vec_dummy:
B B3
NOP 5
; This is the actual interrupt service table (IST).
.sect ".vecs"
.align 1024
_intcVectorTable:
_vector0: VEC_ENTRY _c_int00 ;RESET
_vector1: VEC_ENTRY _vec_dummy ;NMI
_vector2: VEC_ENTRY _vec_dummy ;RSVD
_vector3: VEC_ENTRY _vec_dummy ;RSVD
_vector4: VEC_ENTRY _timer0_isr ;Interrupt4 ISR
_vector5: VEC_ENTRY _vec_dummy
_vector6: VEC_ENTRY _vec_dummy
_vector7: VEC_ENTRY _vec_dummy
_vector8: VEC_ENTRY _vec_dummy
_vector9: VEC_ENTRY _vec_dummy
_vector10: VEC_ENTRY _vec_dummy
_vector11: VEC_ENTRY _vec_dummy
***************************************************
;asm file end
****************************************************
I tried the same way to trigger another timer_isr_1 using TIMER1 ((0x01C21000) ) using interrupt 5 through #define GPIO_OUTPUT2 (0x8).
The interrupt 5 is trigger through SETBIT(IER,0x00000023). But the code is not working as excepted.
I want first timer_isr_0 to be triggered using timer0 ->interrupt 4 and after few cycles i will disable interrupt 4 . I enabled both interrupt 4 and 5 so, when i disable interrupt 4 , then it should automatically trigger the next high priority interrupt 5 which is used for timer_isr_1. But in my case i tried to use timer1 alone instead of timer 0 for timer_isr_0 . But the sampling rate is not in my control. i dont know where i am going wrong.
The following are my doubts:
1) how to timer isr interrupt working through GPIO?
2) what happens when i disable a timer ?
Thanks and Regards,
Lokesha H
