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Mixuture of Single and Burst accesses in AM3517 GPMC

Other Parts Discussed in Thread: AM3517

Hello,

My customer would like to clarify about the mixture accesses between Synchronous Single and Synchronous Burst at the GPMC in AM3517.

Is it possible to change the access protocol dynamically between Synchronous Single and Burst at the GPMC?

Is the updated configuration validated at the bus transaction boundary ? 

If HLOS is applied, will this dynamic swtch make a significant degradation in performance or any other drawback ?

Thanks and Best Regards,

KIMIZUKA

   

  • Hello Kimizuka,

    is your customer wanting to change between single and burst for read and write, but do you mean that they want to do like a single read and a burst write?  If the latter, you can configure read and write seperately please see the TRM for more details on setting up burst which is controlled in the GPMC_CONFIG1_i register. 

    You cannot dynamically change burst to single without disabling the CS first.  This is discussed in section 9.1.5.1 of the Technical Reference Manual.  To change any of the protocol or timing settings you must first disable the CS throught the CSVALID bit in GPMC_CONFIG7_i register.