PROCESSOR-SDK-AM335X: MMC1 error

Vamsi Siddhani

Part Number: PROCESSOR-SDK-AM335X
Other Parts Discussed in Thread: AM3359, AM3352, TPS65910

We are working with SITARA AM3359 processor.

SDK we are using is ti-processor-sdk-linux-am335x-evm-05.00.00.15. In our board, mmc0 is connected to SD Card and mmc1 is connected to eMMC.

We have booted our customized board through SD Card (i.e. mmc0). But we could not detect mmc1 and got mmc1: error -110 whilst initialising MMC card error. Please find the boot log below and help us to proceed further.

U-Boot SPL 2018.01-00228-g4579b130f0-dirty (May 02 2019 - 11:49:36)
Trying to boot from MMC1
*** Warning - bad CRC, using default environment

reading u-boot.img
reading u-boot.img
reading u-boot.img
reading u-boot.img
bootlist count 9,5

U-Boot 2018.01-00228-g4579b130f0-dirty (May 02 2019 - 11:49:36 +0530)

CPU : AM335X-GP rev 2.1
Model: TI AM335x EVM
DRAM: 256 MiB
NAND: 0 MiB
MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
*** Warning - bad CRC, using default environment

<ethaddr> not set. Validating first E-fuse MAC
Net:   cpsw, usb_ether
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc0 is current device
SD/MMC found on device 0
** Unable to read file boot.scr **
** Unable to read file uEnv.txt **
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
switch to partitions #0, OK
mmc0 is current device
SD/MMC found on device 0
3850752 bytes read in 352 ms (10.4 MiB/s)
37553 bytes read in 19 ms (1.9 MiB/s)
## Flattened Device Tree blob at 88000000
   Booting using the fdt blob at 0x88000000
   Loading Device Tree to 8df01000, end 8df0d2b0 ...
Starting kernel ...

[    0.000000] I can't wait to receive it. Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.14.40-g4796173fc5 (sbr@sbr-Lenovo-B50-80) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #5 PREEMPT Tue Jun 4 159
[    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[    0.000000] OF: fdt: Machine model: TI AM335x EVM-SK
[    0.000000] Memory policy: Data cache writeback
[    0.000000] efi: Getting EFI parameters from FDT:
[    0.000000] efi: UEFI not found.
[    0.000000] cma: Reserved 48 MiB at 0x8a800000
[    0.000000] CPU: All CPU(s) started in SVC mode.
[    0.000000] AM335X ES2.1 (sgx neon)
[    0.000000] Built 1 zonelists, mobility grouping on. Total pages: 64960
[    0.000000] Kernel command line: console=ttyO0,115200n8 root=PARTUUID=00015aa8-02 rw rootfstype=ext4 rootwait
[    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Memory: 197276K/262144K available (8192K kernel code, 318K rwdata, 2436K rodata, 1024K init, 275K bss, 15716K reserved, 49152K cma-rese)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap : 0xffc00000 - 0xfff00000   (3072 kB)
[    0.000000]     vmalloc : 0xd0800000 - 0xff800000   ( 752 MB)
[    0.000000]     lowmem : 0xc0000000 - 0xd0000000   ( 256 MB)
[    0.000000]     pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
[    0.000000]     modules : 0xbf000000 - 0xbfe00000   ( 14 MB)
[    0.000000]       .text : 0xc0008000 - 0xc0900000   (9184 kB)
[    0.000000]       .init : 0xc0c00000 - 0xc0d00000   (1024 kB)
[    0.000000]       .data : 0xc0d00000 - 0xc0d4fb88   ( 319 kB)
[    0.000000]        .bss : 0xc0d4fb88 - 0xc0d9493c   ( 276 kB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] Preemptible hierarchical RCU implementation.
[    0.000000] Tasks RCU enabled.
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[    0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts
[    0.000000] OMAP clockevent source: timer2 at 24000000 Hz
[    0.000016] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
[    0.000041] clocksource: timer1: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
[    0.000055] OMAP clocksource: timer1 at 24000000 Hz
[    0.000278] timer_probe: no matching timers found
[    0.000534] Console: colour dummy device 80x30
[    0.000565] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
[    0.000576] This ensures that you still see kernel messages. Please
[    0.000584] update your kernel commandline.
[    0.000619] Calibrating delay loop... 597.60 BogoMIPS (lpj=2988032)
[    0.118768] pid_max: default: 32768 minimum: 301
[    0.119009] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.119029] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.119966] CPU: Testing write buffer coherency: ok
[    0.120783] Setting up static identity map for 0x80100000 - 0x80100060
[    0.120968] Hierarchical SRCU implementation.
[    0.121388] EFI services will not be available.
[    0.123148] devtmpfs: initialized
[    0.133924] random: get_random_u32 called from bucket_table_alloc+0x8c/0x1ac with crng_init=0
[    0.134453] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
[    0.134808] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.134837] futex hash table entries: 256 (order: -1, 3072 bytes)
[    0.139254] pinctrl core: initialized pinctrl subsystem
[    0.140095] DMI not present or invalid.
[    0.140582] NET: Registered protocol family 16
[    0.143343] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.161468] omap_hwmod: debugss: _wait_target_disable failed
[    0.216015] cpuidle: using governor ladder
[    0.216061] cpuidle: using governor menu
[    0.221686] OMAP GPIO hardware version 0.1
[    0.232950] omap-gpmc 50000000.gpmc: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_gpmc_pins, deferring probe
[    0.235749] No ATAGs?
[    0.235766] hw-breakpoint: debug architecture 0x4 unsupported.
[    0.253232] edma 49000000.edma: TI EDMA DMA engine driver
[    0.257837] omap_i2c 44e0b000.i2c: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_i2c0_pins, deferring probe
[    0.258020] media: Linux media interface: v0.10
[    0.258074] Linux video capture interface: v2.00
[    0.258215] pps_core: LinuxPPS API ver. 1 registered
[    0.258227] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.258259] PTP clock support registered
[    0.258304] EDAC MC: Ver: 3.0.0
[    0.259016] dmi: Firmware registration failed.
[    0.259530] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400
[    0.259948] Advanced Linux Sound Architecture Driver Initialized.
[    0.261341] clocksource: Switched to clocksource timer1
[    0.272400] NET: Registered protocol family 2
[    0.273302] TCP established hash table entries: 2048 (order: 1, 8192 bytes)
[    0.273347] TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
[    0.273384] TCP: Hash tables configured (established 2048 bind 2048)
[    0.273502] UDP hash table entries: 256 (order: 0, 4096 bytes)
[    0.273528] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[    0.273711] NET: Registered protocol family 1
[    0.274205] RPC: Registered named UNIX socket transport module.
[    0.274224] RPC: Registered udp transport module.
[    0.274233] RPC: Registered tcp transport module.
[    0.274242] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.275342] hw perfevents: no interrupt-affinity property for /pmu, guessing.
[    0.275486] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 counters available
[    0.277311] workingset: timestamp_bits=14 max_order=16 bucket_order=2
[    0.283161] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.284061] NFS: Registering the id_resolver key type
[    0.284111] Key type id_resolver registered
[    0.284121] Key type id_legacy registered
[    0.284179] ntfs: driver 2.1.32 [Flags: R/O].
[    0.286608] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245)
[    0.286631] io scheduler noop registered
[    0.286643] io scheduler deadline registered
[    0.286925] io scheduler cfq registered (default)
[    0.286939] io scheduler mq-deadline registered
[    0.286950] io scheduler kyber registered
[    0.288702] pinctrl-single 44e10800.pinmux: 142 pins at pa f9e10800 size 568
[    0.356921] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled
[    0.360703] 44e09000.serial: ttyS0 at MMIO 0x44e09000 (irq = 30, base_baud = 3000000) is a 8250
[    0.992276] console [ttyS0] enabled
[    0.997034] 48022000.serial: ttyS1 at MMIO 0x48022000 (irq = 31, base_baud = 3000000) is a 8250
[    1.007029] 481a8000.serial: ttyS4 at MMIO 0x481a8000 (irq = 32, base_baud = 3000000) is a 8250
[    1.018051] omap_rng 48310000.rng: Random Number Generator ver. 20
[    1.026672] OF: graph: no port node found in /ocp/lcdc@4830e000
[    1.032987] OF: graph: no port node found in /ocp/lcdc@4830e000
[    1.039423] OF: graph: no port node found in /ocp/lcdc@4830e000
[    1.045446] tilcdc 4830e000.lcdc: no encoders/connectors found
[    1.063427] brd: module loaded
[    1.074842] loop: module loaded
[    1.081146] m25p80 spi0.0: unrecognized JEDEC id bytes(spi-nor.c): ff, ff, ff
[    1.088678] m25p80: probe of spi0.0 failed with error -2
[    1.096134] libphy: Fixed MDIO Bus: probed
[    1.171434] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6, bus freq 1000000
[    1.179141] davinci_mdio 4a101000.mdio: detected phy mask ffffffde
[    1.187511] libphy: 4a101000.mdio: probed
[    1.191680] davinci_mdio 4a101000.mdio: phy[0]: device 4a101000.mdio:00, driver TI DP83867
[    1.199989] davinci_mdio 4a101000.mdio: phy[5]: device 4a101000.mdio:05, driver TI DP83867
[    1.209399] cpsw 4a100000.ethernet: Detected MACID = 30:45:11:de:3c:49
[    1.216310] cpsw 4a100000.ethernet: initialized cpsw ale version 1.4
[    1.222778] cpsw 4a100000.ethernet: ALE Table size 1024
[    1.228081] cpsw 4a100000.ethernet: cpts: overflow check period 500 (jiffies)
[    1.236335] cpsw 4a100000.ethernet: cpsw: Detected MACID = 30:45:11:de:3c:4b
[    1.245016] i2c /dev entries driver
[    1.249075] IR NEC protocol handler initialized
[    1.253707] IR RC5(x/sz) protocol handler initialized
[    1.258783] IR RC6 protocol handler initialized
[    1.263354] IR JVC protocol handler initialized
[    1.267903] IR Sony protocol handler initialized
[    1.272558] IR SANYO protocol handler initialized
[    1.277283] IR Sharp protocol handler initialized
[    1.282025] IR MCE Keyboard/mouse protocol handler initialized
[    1.287882] IR XMP protocol handler initialized
[    1.294605] cpuidle: enable-method property 'ti,am3352' found operations
[    1.301920] sdhci: Secure Digital Host Controller Interface driver
[    1.308134] sdhci: Copyright(c) Pierre Ossman
[    1.315041] sdhci-pltfm: SDHCI platform and OF driver helper
[    1.321738] ledtrig-cpu: registered to indicate activity on CPUs
[    1.331930] NET: Registered protocol family 10
[    1.338170] Segment Routing with IPv6
[    1.342114] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[    1.348904] NET: Registered protocol family 17
[    1.353817] Key type dns_resolver registered
[    1.358369] omap_voltage_late_init: Voltage driver support not added
[    1.371547] omap-gpmc 50000000.gpmc: GPMC revision 6.0
[    1.376741] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000
[    1.411592] tps65910 0-002d: No interrupt support, no core IRQ
[    1.419803] vrtc: supplied by vbat
[    1.427150] vio: supplied by vbat
[    1.432142] vdd1: supplied by vbat
[    1.437525] vdd2: supplied by vbat
[    1.444066] random: fast init done
[    1.447969] vdig1: supplied by vbat
[    1.453016] vdig2: supplied by vbat
[    1.458001] vpll: supplied by vbat
[    1.462931] vdac: supplied by vbat
[    1.467838] vaux1: supplied by vbat
[    1.472870] vaux2: supplied by vbat
[    1.477868] vaux33: supplied by vbat
[    1.483005] vmmc: supplied by vbat
[    1.487918] vbb: supplied by vbat
[    1.493117] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
[    1.622743] hctosys: unable to open rtc device (rtc0)
[    1.628764] lis3_reg: disabling
[    1.636404] ALSA device list:
[    1.639466]   No soundcards found.
[    1.644097] Waiting for root device PARTUUID=00015aa8-02...
[    1.671612] mmc0: host does not support reading read-only switch, assuming write-enable
[    1.684392] mmc0: new high speed SDHC card at address aaaa
[    1.690553] mmcblk0: mmc0:aaaa SS16G 14.8 GiB
[    1.699979] mmcblk0: p1 p2
[    1.762600] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
[    1.770892] VFS: Mounted root (ext4 filesystem) on device 179:2.
[    1.788480] devtmpfs: mounted
[    1.793619] Freeing unused kernel memory: 1024K
[    2.011467] mmc1: error -110 whilst initialising MMC card
[    2.193096] systemd[1]: System time before build time, advancing clock.
[    2.265964] systemd[1]: systemd 234 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNU)
[    2.288008] systemd[1]: Detected architecture arm.

Welcome to Arago 2018.10!

[    2.332704] systemd[1]: Set hostname to <am335x-evm>.
[    2.721695] systemd[1]: /lib/systemd/system/gadget-init.service:15: Unknown lvalue 'ExecStopPre' in section 'Service'
[    3.015539] random: systemd: uninitialized urandom read (16 bytes read)
[    3.023193] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
[ OK ] Started Forward Password Requests to Wall Directory Watch.
[    3.062443] random: systemd: uninitialized urandom read (16 bytes read)
[    3.069820] systemd[1]: Listening on Syslog Socket.
[ OK ] Listening on Syslog Socket.
[    3.102072] random: systemd: uninitialized urandom read (16 bytes read)
[    3.109036] systemd[1]: Listening on Network Service Netlink Socket.
[ OK ] Listening on Network Service Netlink Socket.
[    3.152202] systemd[1]: Reached target Remote File Systems.
[ OK ] Reached target Remote File Systems.
[    3.182367] systemd[1]: Listening on udev Kernel Socket.
[ OK ] Listening on udev Kernel Socket.
[    3.215182] systemd[1]: Created slice System Slice.
[ OK ] Created slice System Slice.
         Mounting POSIX Message Queue File System...
         Mounting Kernel Debug File System...
[ OK ] Created slice User and Session Slice.
[ OK ] Reached target Slices.
[ OK ] Listening on Journal Socket (/dev/log).
[ OK ] Created slice system-getty.slice.
[ OK ] Listening on Journal Socket.
[ OK ] Listening on Process Core Dump Socket.
[ OK ] Created slice system-serial\x2dgetty.slice.
[ OK ] Reached target Swap.
         Mounting Temporary Directory (/tmp)...
[ OK ] Listening on udev Control Socket.
         Starting Remount Root and Kernel File Systems...
[ OK ] Listening on /dev/initctl Compatibility Named Pipe.
[    3.680018] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null)
[ OK ] Started Dispatch Password Requests to Console Directory Watch.
[ OK ] Reached target Paths.
         Starting Journal Service...
         Starting Load Kernel Modules...
[ OK ] Mounted Kernel Debug File System.
[ OK ] Mounted POSIX Message Queue File System.
[ OK ] Mounted Temporary Directory (/tmp).
[ OK ] Started Remount Root and Kernel File Systems.
[FAILED] Failed to start Load Kernel Modules.
See 'systemctl status systemd-modules-load.service' for details.
[ OK ] Started Journal Service.
         Starting Apply Kernel Variables...
         Mounting Kernel Configuration File System...
         Starting Flush Journal to Persistent Storage...
         Starting Create System Users...
         Starting Rebuild Hardware Database...
[ OK ] Mounted Kernel Configuration File System.
[ OK ] Started Apply Kernel Variables.
[ OK ] Started Create System Users.
[    4.482325] systemd-journald[68]: Received request to flush runtime journal from PID 1
         Starting Create Static Device Nodes in /dev...
[ OK ] Started Flush Journal to Persistent Storage.
[ OK ] Started Create Static Device Nodes in /dev.
[ OK ] Reached target Local File Systems (Pre).
         Mounting /var/volatile...
         Mounting /media/ram...
         Starting udev Kernel Device Manager...
[ OK ] Mounted /var/volatile.
[ OK ] Mounted /media/ram.
         Starting Load/Save Random Seed...
[ OK ] Reached target Local File Systems.
         Starting Rebuild Dynamic Linker Cache...
         Starting Rebuild Journal Catalog...
         Starting Create Volatile Files and Directories...
[ OK ] Started Load/Save Random Seed.
[ OK ] Started udev Kernel Device Manager.
[ OK ] Started Rebuild Journal Catalog.
[ OK ] Started Create Volatile Files and Directories.
         Starting Network Time Synchronization...
         Starting Update UTMP about System Boot/Shutdown...
[ OK ] Started Rebuild Dynamic Linker Cache.
[ OK ] Started Update UTMP about System Boot/Shutdown.
[ OK ] Started Network Time Synchronization.
[ OK ] Reached target System Time Synchronized.
[ OK ] Started Rebuild Hardware Database.
         Starting Update is Completed...
         Starting udev Coldplug all Devices...
[ OK ] Started Update is Completed.
[ OK ] Found device /dev/ttyS0.
[ OK ] Started udev Coldplug all Devices.
[ OK ] Reached target System Initialization.
[ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket.
[ OK ] Started Daily rotation of log files.
[ OK ] Listening on RPCbind Server Activation Socket.
[ OK ] Started Daily Cleanup of Temporary Directories.
[ OK ] Reached target Timers.
[ OK ] Listening on dropbear.socket.
         Starting Network Service...
[ OK ] Listening on D-Bus System Message Bus Socket.
[ OK ] Reached target Sockets.
[ OK ] Reached target Basic System.
[ OK ] Started Kernel Logging Service.
[ OK ] Started Hardware RNG Entropy Gatherer Daemon.
         Starting uim-sysfs.service...
[   11.204974] random: crng init done
[   11.208422] random: 7 urandom warning(s) missed due to ratelimiting
[ OK ] Started System Logging Service.
         Starting RPC Bind Service...
[ OK ] Started D-Bus System Message Bus.
         Starting Print notice about GPLv3 packages...
[ OK ] Reached target Containers.
         Starting Avahi mDNS/DNS-SD Stack...
[ OK ] Started Periodic Command Scheduler.
[ OK ] Started Job spooling tools.
[   13.449714] net eth1: initializing cpsw version 1.12 (0)
         Starting Login Service...
[ OK ] Started Network Service.
[   13.697361] TI DP83867 4a101000.mdio:05: attached PHY driver [TI DP83867] (mii_bus:phy_addr=4a101000.mdio:05, irq=POLL)
[ OK ] Started RPC Bind Service.
[   14.066210] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready
[ OK ] Found device /dev/ttyS3.
[   14.386461] net eth0: initializing cpsw version 1.12 (0)
[   14.526218] TI DP83867 4a101000.mdio:00: attached PHY driver [TI DP83867] (mii_bus:phy_addr=4a101000.mdio:00, irq=POLL)
[   14.716406] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[   15.066335] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
[ OK ] Found device /dev/mmcblk0p1.
[ OK ] Started Avahi mDNS/DNS-SD Stack.
[ OK ] Started Login Service.
         Starting Start USB gadget...
[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch.
         Starting Wait for Network to be Configured...
[ OK ] Reached target Network.
         Starting Lightning Fast Webserver With Light System Requirements...
[ OK ] Started Redis In-Memory Data Store.
         Starting Enable and configure wl18xx bluetooth stack...
         Starting Simple Network Management Protocol (SNMP) Daemon....
         Starting Permit User Sessions...
         Starting Network Name Resolution...
[ OK ] Started Lightning Fast Webserver With Light System Requirements.
[ OK ] Started Permit User Sessions.
[ OK ] Started uim-sysfs.service.
[FAILED] Failed to start Start USB gadget.
See 'systemctl status gadget-init.service' for details.
[ OK ] Started Network Name Resolution.
[ OK ] Started Enable and configure wl18xx bluetooth stack.
[ OK ] Started Simple Network Management Protocol (SNMP) Daemon..
***************************************************************
***************************************************************
NOTICE: This file system contains the following GPLv3 packages:
        autoconf
        bash-dev
        bash
        binutils
        cifs-utils
        cpio
        cpp-symlinks
        cpp
        dosfstools
        elfutils
        findutils
        g++-symlinks
        g++
        gawk
        gcc-symlinks
        gcc
        gdb
        gdbserver
        gettext
        glmark2
        gstreamer1.0-libav
        gzip
        hidapi
        libdw1
        libelf1
        libgdbm-compat4
        libgdbm-dev
        libgdbm4
        libgettextlib
        libgettextsrc
        libgmp10
        libidn11
        libmavconn
        libmpc3
        libmpfr4
        libreadline-dev
        libreadline7
        libunistring2
        m4-dev
        m4
        make
        mavlink
        mavros-extras
        mavros-msgs
        mavros
        nettle
        python3-pycairo
        socketcan-interface
        which

If you do not wish to distribute GPLv3 components please remove
the above packages prior to distribution. This can be done using
the opkg remove command. i.e.:
    opkg remove <package>
Where <package> is the name printed in the list above

NOTE: If the package is a dependency of another package you
      will be notified of the dependent packages. You should
      use the --force-removal-of-dependent-packages option to
      also remove the dependent packages as well
***************************************************************
***************************************************************
[ OK ] Started Print notice about GPLv3 packages.
[ OK ] Reached target Host and Network Name Lookups.
[ OK ] Started NFS status monitor for NFSv2/3 locking..
         Starting rc.pvr.service...
[ OK ] Started Getty on tty1.
[ OK ] Started Serial Getty on ttyS0.
[ OK ] Started Serial Getty on ttyS3.
[ OK ] Started rc.pvr.service.
         Starting weston.service...
[ OK ] Started weston.service.
         Starting telnetd.service...
         Starting Matrix GUI...
[ OK ] Started telnetd.service.
         Starting busybox-udhcpd.service...
         Starting thttpd.service...
[ OK ] Started Matrix GUI.
[ OK ] Started busybox-udhcpd.service.
[ OK ] Started thttpd.service.
         Starting rng-tools.service...
[ OK ] Started rng-tools.service.

_____                    _____           _         _
| _ |___ ___ ___ ___   | _ |___ ___ |_|___ ___| |_
|     | _| .'| . | . | |   __| _| . | | | -_| _| _|
|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_|
              |___|                    |___|

Arago Project http://arago-project.org am335x-evm ttyS0

Arago 2018.10 am335x-evm ttyS0

am335x-evm login: root

Regards

Vamsi Siddhani

over 5 years ago

0 Andreas Dannenberg over 5 years ago

TI__Guru 69707 points

Won't be able to look into this until later this week or early next week. Thanks for your patience.

0 Andreas Dannenberg over 5 years ago in reply to Andreas Dannenberg

TI__Guru 69707 points

The error -110 means ETIMEDOUT (Connection timed out), see include/uapi/asm-generic/errno.h. This points to some communication issue with your eMMC a.k.a. mmc1, which could be caused by a mis-conifguration of sorts (related to the DTS entries describing mmc1 including pinmux and modes) or some HW issue.

Can you access the eMMC module in U-Boot?

Try...

=> mmc dev 1
=> mmc rescan
=> mmc info

At any rate you probably want to compare your DTS files and board configuration to that of the AM335x GP EVM in both U-Boot and Kernel as a first step.

Regards, Andreas

0 Vamsi Siddhani over 5 years ago in reply to Andreas Dannenberg

Expert 1420 points

Thanks to Andreas Dannenberg,

We've fabricated new board in which eMMC is detected in SD Card mode. We've successfully partitioned eMMC into 2 partitions. while copying files into eMMC partitions, we are facing read-write issues during transferring the Linux file system on to it. Please find the attached error log read_write_error_log.txt while copying to /dev/mmcbl1p1 and /dev/mmcblk1p2 partitions.

The following image shows the output of df -h and fdisk /dev/mmcblk for your reference.

We have also attached the procedure

Fullscreen eMMC_booting_procedure.txt Download

1. The eMMC is /dev/mmcblk1. Format it this way: #fdisk /dev/mmcblk1 o - this clears the existing partitions p - this lists all partition tables on the card (there should be none) n - create a new partition p - primary partition 1 - partition number 2048 - default value for the first sector +16M - last sector / partition size t - change the partition type (select partition 1) e - change tha partition type to "W95 FAT16 (LBA)" a - set the bootable flag for the selected partition (1) n - create a new partition p - primary partition 2 - partition number hit Enter to choose the default (next available) value for the first sector hit Enter to choose the default (last) value for the last sector p - this lists all partition tables on the card (there should be two) w - write all the above changes to disk #umount /dev/mmcblk1p1; #mkfs.vfat -F 16 /dev/mmcblk1p1 - format the first partition #umount /dev/mmcblk1p2; #mkfs.ext4 /dev/mmcblk1p2 - format the second partition 2. Copy the {MLO,u-boot.img,uEnv.txt} files to the first partition: # mkdir boot # mount /dev/mmcblk1p1 boot # cp {MLO,u-boot.img,uEnv.txt} boot # umount boot 3. Copy the root file system to the second partition: # mkdir root # mount /dev/mmcblk1p2 root # tar -xf tisdk-rootfs-image-am335x-ev

what we've followed while partitioning using fdisk /dev/mmcblk1 and also the DTS file and schematic 5710.eMMC.pdf

Note here that mmc0(/dev/mmcblk0) is SD Card and mmc1 (/dev/mmcblk1) is eMMC.

Please help us in finding the issue causing the read-write error. As we have severe time restrictions, please assume this as a high priority query.

Thanks & Regards

Vamsi Siddhani

0 Andreas Dannenberg over 5 years ago in reply to Vamsi Siddhani

TI__Guru 69707 points

Vamsi,

Seems like communication with your eMMC card is unreliable for some reason. Error -84 means "Illegal byte sequence" and that coming from the low-level driver is not a good sign.

Do you see the same issue on multiple boards?
What is the trace length between the SoC and the eMMC? Are all traces of approx. same length?
Did you follow standard signal routing and shielding guidelines?
Is the eMMC power supply clean and glitch free? Please attach a digital scope at the point the eMMC is powered to make sure there are no significant dips/spikes during eMMC access especially programming

Then you can try to reduce the clock frequency used to talk to the eMMC to see if this does anything. Try adding max-frequency = <250000>; (or lower) to the respective device tree node.

Regards, Andreas

0 Vamsi Siddhani over 5 years ago in reply to Andreas Dannenberg

Expert 1420 points

Thanks a lot, Andreas for your quick reply.

1. No, we didn't see this issue on any other board. Right now we are having 2 boards with us in which on the first board, this eMMC itself is not getting detected in SD Card mode and in the second board, as I mentioned above it is working fine up to partitioning.

Before answering your 2nd query, I want to know, how exactly can I check this trace length between Soc and the eMMC?

For 3 and 4, I'll give details tomorrow morning once I reach the office. After that, I'll try with reduced max-frequency as you suggested and I'll let you know the status.

Regards, Vamsi.

0 Vamsi Siddhani over 5 years ago in reply to Vamsi Siddhani

Expert 1420 points

Hi Andreas,

What is the trace length between the SoC and the eMMC? Are all traces of approx. same length?

Can you elaborate on how exactly we should check trace length between them. Right now we are using only one data line between SoC and eMMC. In our schematic,

GPMC_AD0 is used for mmc1_dat0,

GPMC_CSn2 is used as MMC1_CMD and

GPMC_CSn1 is used as MMC1_CLK (Attached

Fullscreen 7433.am335x-evmsk.dts.txt Download

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/*
 * AM335x Starter Kit
 * http://www.ti.com/tool/tmdssk3358
 */

/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "TI AM335x EVM-SK";
	compatible = "ti,am335x-evmsk", "ti,am33xx";

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	chosen {
		stdout-path = &uart0;
	};

	vbat: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	lis3_reg: fixedregulator1 {
		compatible = "regulator-fixed";
		regulator-name = "lis3_reg";
		regulator-boot-on;
	};


	vtt_fixed: fixedregulator3 {
		compatible = "regulator-fixed";
		regulator-name = "vtt";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
	};

	//lcd_bl: backlight {
	//	compatible = "pwm-backlight";
	//	pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
	//	brightness-levels = <0 58 61 66 75 90 125 170 255>;
	//	default-brightness-level = <8>;
	//};
	
	//sound {
	//	compatible = "simple-audio-card";
	//	simple-audio-card,name = "AM335x-EVMSK";
	//	simple-audio-card,widgets =
	//		"Headphone", "Headphone Jack";
	//	simple-audio-card,routing =
	//		"Headphone Jack",	"HPLOUT",
	//		"Headphone Jack",	"HPROUT";
	//	simple-audio-card,format = "dsp_b";
	//	simple-audio-card,bitclock-master = <&sound_master>;
	//	simple-audio-card,frame-master = <&sound_master>;
	//	simple-audio-card,bitclock-inversion;

	//	simple-audio-card,cpu {
	//		sound-dai = <&mcasp1>;
	//	};

	//	sound_master: simple-audio-card,codec {
	//		sound-dai = <&tlv320aic3106>;
	//		system-clock-frequency = <24000000>;
	//	};
	//};

	//panel {
	//	compatible = "ti,tilcdc,panel";
	//	pinctrl-names = "default", "sleep";
		//pinctrl-0 = <&lcd_pins_default>;
		//pinctrl-1 = <&lcd_pins_sleep>;
		//backlight = <&lcd_bl>;
	//	status = "okay";
	//	panel-info {
	///		ac-bias		= <255>;
	//		ac-bias-intrpt	= <0>;
	//		dma-burst-sz	= <16>;
	//		bpp		= <32>;
	//		fdd		= <0x80>;
	//		sync-edge	= <0>;
	//		sync-ctrl	= <1>;
	//		raster-order	= <0>;
	//		fifo-th		= <0>;
	//	};
	//	display-timings {
	//		480x272 {
	//			hactive		= <480>;
	//			vactive		= <272>;
	//			hback-porch	= <43>;
	//			hfront-porch	= <8>;
	//			hsync-len	= <4>;
	//			vback-porch	= <12>;
	//			vfront-porch	= <4>;
	//			vsync-len	= <10>;
	//			clock-frequency = <9000000>;
	//			hsync-active	= <0>;
	//			vsync-active	= <0>;
	//		};
	//	};
	//};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&ddr3_vtt_toggle>;

	ddr3_vtt_toggle: ddr3_vtt_toggle {
		pinctrl-single,pins = <
			0x164 (PIN_OUTPUT | MUX_MODE7)	/* ecap0_in_pwm0_out.gpio0_7 */
		>;
	};

	//emmc_reset: emmc_reset {
          //      pinctrl-single,pins = <
            //            0x07c (PIN_OUTPUT_PULLUP | MUX_MODE7)   /* gpmc_csn0.mmc1_rstn */
              //  >;
        //};

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
		>;
	};

	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
		>;
	};

	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_ctsn.uart1_ctsn */
			AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* uart1_rtsn.uart1_rtsn */
			AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */
			AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_txd.uart1_txd */
		>;
	};

	uart4_pins: pinmux_uart4_pins {
		pinctrl-single,pins = <
			//AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6)	/* gpmc_wait0.uart4_rxd */
			//AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6)	/* gpmc_wpn.uart4_txd */
			AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE1)	/* uart0_ctsn.uart4_rxd */
			AM33XX_IOPAD(0x96C, PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* uart0_rtsn.uart4_txd */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
			AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
			AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
			AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */

			/* Slave 2 */
			AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
			AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
			AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
			AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
			AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
			AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)

			/* Slave 2 reset value*/
			AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) 		/* spi0_cs1.gpio0_6 */
			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */
			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */
			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */
			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */
			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */
			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */
			//AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE7)		/* mcasp0_aclkr.mmc0_sdwp */
		>;
	};


	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1)	/* gpmc_ad0.mmc1_dat0 */
			AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn1.mmc1_clk */
			AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn2.mmc1_cmd */
			//AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad8.mmc1_dat0 */
			//AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad9.mmc1_dat1 */
			//AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad10.mmc1_dat2 */
			//AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad11.mmc1_dat3 */
			//AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad12.mmc1_dat4 */
			//AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad13.mmc1_dat5 */
			//AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad14.mmc1_dat6 */
			//AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad15.mmc1_dat7 */
			//AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn1.mmc1_clk */
			//AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn2.mmc1_cmd */
			//AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) 	/* gpmc_csn0.mmc1_rstn */
			//AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE7) 	/* gpmc_csn3.mmc1_ds */
		>;
	};	

	gpmc_pins: pinmux_gpmc_pins {
		pinctrl-single,pins = <
			//AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
			AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad8.gpmc_ad8 */
			//AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad9.mmc1_dat1 */
			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) 	/* gpmc_OEn_REn.gpmc_OEn_REn */
			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) 	/* gpmc_ADVn_ALE.gpmc_ADVn_ALE */
			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)	/* gpmc_BEn0_CLE.gpmc_BEn0_CLE */
			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)	/* GPMC_WEn.GPMC_WEn */
			//AM33XX_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE0)	/* gpmc_csn0 */
			//AM33XX_IOPAD(0x9B0, PIN_INPUT_PULLUP | MUX_MODE7)	/* XDMA_EVENT_INTR0.AM335X_LOC1 */
			//AM33XX_IOPAD(0x9B4, PIN_INPUT_PULLUP | MUX_MODE0)	/* XDMA_EVENT_INTR1.AM335X_LOC2 */
		>;
	};	
	
	spi0_pins: spi0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP  | MUX_MODE0) 	//spi0_sclk
			AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0) 		//spi0_d0
			AM33XX_IOPAD(0x958, PIN_INPUT  | MUX_MODE0)		//spi0_d1
			AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)	//spi0_cs0
		>;
	};

	spi1_pins: spi1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x908, PIN_INPUT | MUX_MODE2)	/* mii1_col.spi1_sclk */
			AM33XX_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE2)   	/* mii1_crs.spi1_d0 */
			AM33XX_IOPAD(0x910, PIN_INPUT | MUX_MODE2) 	/* mii1_rxerr.spi1_d1 */
			AM33XX_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3)	/* mcasp0_ahclkr.spi1_cs0 */
		>;
	};

};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;

	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_pins>;

	status = "okay";
};

&spi0 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&spi0_pins>;
    ti,pindir-d0-out-d1-in = <1>;

    spi_nor: flash@0 {
        #address-cells = <1>;
        #size-cells = <1>;
        #compatible = "jedec,spi-nor";
	compatible = "jedec,spi-nor";
        spi-max-frequency = <3000000>;
        m25p,fast-read;
        reg = <0>;

        //partition@0 {
            //label = "u-boot-spl";
            //reg = <0x0 0x80000>;
            ////read-only;
        //};

        //partition@1 {
            //label = "u-boot";
            //reg = <0x80000 0x100000>;
            ////read-only;
        //};

        //partition@2 {
            //label = "u-boot-env";
            //reg = <0x180000 0x20000>;
            ////read-only;
        //};

        partition@0 {
            label = "MasterSlaveWrite";
            //reg = <0x1A0000 0x1E60000>;
	    reg = <0x0 0x1E60000>;
        };
    };
};

&gpmc
{
	pinctrl-names = "default";
	pinctrl-0 = <&gpmc_pins>;
	ranges = <2 0 0x01000000 0x01000000>; /* fpga */
	status = "okay";
	fpga{
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <2 0 0x01000000>;
		bank-width = <2>;

		gpmc,sync-clk-ps=<0>; /* Minimum clock period for synchronous mode, in picoseconds */

		gpmc,cs-on-ns = <0>;		/* Assertion time */
		gpmc,cs-rd-off-ns = <10>;	/* Read deassertion time */
		gpmc,cs-wr-off-ns = <6>;	/* Write deassertion time */

		/* ADV signal timings (in nanoseconds) corresponding to GPMC_CONFIG3: */
		gpmc,adv-on-ns = <1>;		/* Assertion time */
		gpmc,adv-rd-off-ns = <1>;	/* Read deassertion time */
		gpmc,adv-wr-off-ns = <1>;	/* Write deassertion time */

		/* WE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4: */
		gpmc,we-on-ns = <1>;		/* Assertion time */
		gpmc,we-off-ns = <1>;		/* Deassertion time */

		/* OE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4: */
		gpmc,oe-on-ns = <3>;		/* Assertion time */
		gpmc,oe-off-ns = <10>;		/* Deassertion time */

		/* Access time and cycle time timings (in nanoseconds) corresponding to GPMC_CONFIG5: */
		gpmc,access-ns = <9>;			/* Start-cycle to first data valid delay */
		gpmc,page-burst-access-ns = <1>;	/* Multiple access word delay */
		gpmc,rd-cycle-ns = <9>;			/* Total read cycle time */
		gpmc,wr-cycle-ns = <6>;			/* Total write cycle time */


		gpmc,burst-length= <8>; 	//	Page/burst length. Must be 4, 8 or 16.
		gpmc,burst-wrap;		//	Enables wrap bursting
		gpmc,burst-read; 		//	Enables read page/burst mode
		gpmc,burst-write;		//	Enables write page/burst mode

		gpmc,device-width=<2>;/* Total width of device(s) connected to a GPMC chip-select in bytes. The GPMC supports 8-bit and 16-bit devices 						and so this property must be 1 or 2. */

		//gpmc,sync-read;
		//gpmc,sync-write;

	};
};

&spi1
{
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins>;
	ti,pindir-d0-out-d1-in = <1>;
	status = "okay";
	spidev@1
	{
		pinctrl-0 = <&spi1_pins>;
		compatible = "spidev";
		spi-max-frequency = <48000000>;
		reg = <0>;
	};
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	tps: tps@2d {
		reg = <0x2d>;
	};

	lis331dlh: lis331dlh@18 {
		compatible = "st,lis331dlh", "st,lis3lv02d";
		reg = <0x18>;
		Vdd-supply = <&lis3_reg>;
		Vdd_IO-supply = <&lis3_reg>;

		st,click-single-x;
		st,click-single-y;
		st,click-single-z;
		st,click-thresh-x = <10>;
		st,click-thresh-y = <10>;
		st,click-thresh-z = <10>;
		st,irq1-click;
		st,irq2-click;
		st,wakeup-x-lo;
		st,wakeup-x-hi;
		st,wakeup-y-lo;
		st,wakeup-y-hi;
		st,wakeup-z-lo;
		st,wakeup-z-hi;
		st,min-limit-x = <120>;
		st,min-limit-y = <120>;
		st,min-limit-z = <140>;
		st,max-limit-x = <550>;
		st,max-limit-y = <550>;
		st,max-limit-z = <750>;
	};

	tlv320aic3106: tlv320aic3106@1b {
		#sound-dai-cells = <0>;
		compatible = "ti,tlv320aic3106";
		reg = <0x1b>;
		status = "okay";

		/* Regulators */
		AVDD-supply = <&vaux2_reg>;
		IOVDD-supply = <&vaux2_reg>;
		DRVDD-supply = <&vaux2_reg>;
		DVDD-supply = <&vbat>;
	};
};

&usb {
	status = "disabled";
};

&usb_ctrl_mod {
	status = "disabled";
};

&usb0_phy {
	status = "disabled";
};

//&usb1_phy {
//	status = "disabled";
//};

&usb0 {
	status = "disabled";
};

//&usb1 {
//	status = "disabled";
//	dr_mode = "host";
//};

&cppi41dma  {
	status = "okay";
};

&epwmss2 {
	status = "okay";

	ecap2: ecap@48304100 {
		status = "okay";
		pinctrl-names = "default";
		//pinctrl-0 = <&ecap2_pins>;
	};
};

&wkup_m3_ipc {
	ti,needs-vtt-toggle;
	ti,vtt-gpio-pin = <7>;
	ti,scale-data-fw = "am335x-evm-scale-data.bin";
};

#include "tps65910.dtsi"

&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1351500>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
		};
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	dual_emac = <1>;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <5>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <2>;
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmc_reg>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	//cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

&sham {
	status = "okay";
};

&aes {
	status = "okay";
};

&gpio0 {
	status = "okay";
	ti,no-reset-on-init;
};

&mmc2 {
	status = "okay";
	vmmc-supply = <&vmmc_reg>;
	ti,non-removable;
	bus-width = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;

};

&tscadc {
	status = "okay";
	tsc {
		ti,wires = <4>;
		ti,x-plate-resistance = <200>;
		ti,coordinate-readouts = <5>;
		ti,wire-config = <0x00 0x11 0x22 0x33>;
	};
};

&lcdc {
	status = "okay";

	blue-and-red-wiring = "crossed";
};

&sgx {
	status = "okay";
};

&rtc {
	clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
	clock-names = "ext-clk", "int-clk";
};

&pruss_soc_bus {
	status = "okay";

	pruss: pruss@0 {
		status = "okay";
	};
};

file for your reference and note that mmc1 is named as mmc2 for the node in dts)

Did you follow standard signal routing and shielding guidelines? - standard guidelines are followed.

Is the eMMC power supply clean and glitch free? Please attach a digital scope at the point the eMMC is powered to make sure there are no significant dips/spikes during eMMC access especially programming

We didn't observe any glitches on the power supply line of eMMC during standby and while file transfer. Please find the attached of the same.

Regards, Vamsi

0 Andreas Dannenberg over 5 years ago in reply to Vamsi Siddhani

TI__Guru 69707 points

Vamsi Siddhani said:
1. No, we didn't see this issue on any other board. Right now we are having 2 boards with us in which on the first board, this eMMC itself is not getting detected in SD Card mode and in the second board, as I mentioned above it is working fine up to partitioning.

Okay thanks for the info. This sounds like a hardware issue of sorts.

Vamsi Siddhani said:
Before answering your 2nd query, I want to know, how exactly can I check this trace length between Soc and the eMMC?

Use your PCB design/layout software to inspect the traces? Can you post a screenshot of the layout section between the SoC and the eMMC?

Regards, Andreas

0 Vamsi Siddhani over 5 years ago in reply to Andreas Dannenberg

Expert 1420 points

Hi Andreas,

I'm happy to inform you that now we are able to copy files to eMMC. We put a jumper between eMMC dat0 and GPMC_AD9 externally. It might be an issue with improper routing at the time of fabrication.

Now, we've copied MLO, u-boot to /dev/mmcblk1p1 and dtb, zImage to /dev/mmcblk1p2. We removed SD card and changed boot settings to eMMC. 11100[0:4] in our case.

The following changes we made to reflect this.

Present -->>> R91, R125, R118, R310, R315

Removed -->>> R100, R112, R121, R124, R314

Now, we switched off the board, removed SD Card and again switched on.

Now, we are getting the following error.

U-Boot SPL 2018.01-00228-g4579b130f0-dirty (May 02 2019 - 11:49:36)
Trying to boot from MMC2
mmc_read_data: timedout waiting for status!
spl: mmc init failed with error: -22
Trying to boot from MMC1
spl: mmc init failed with error: -95
Trying to boot from MMC2
omap_hsmmc_send_cmd: timedout waiting on cmd inhibit to clear
spl: mmc init failed with error: -110
Trying to boot from MMC1
spl: mmc init failed with error: -95
Trying to boot from NAND

Now, again we inserted SD Card with above boot settings, and the following is the boot log.

U-Boot SPL 2018.01-00228-g4579b130f0-dirty (May 02 2019 - 11:49:36)
Trying to boot from MMC2
mmc_read_data: timedout waiting for status!
spl: mmc init failed with error: -22
Trying to boot from MMC1
*** Warning - bad CRC, using default environment

reading u-boot.img
reading u-boot.img
reading u-boot.img
reading u-boot.img
bootlist count 8,5

U-Boot 2018.01-00228-g4579b130f0-dirty (May 02 2019 - 11:49:36 +0530)

CPU : AM335X-GP rev 2.1
Model: TI AM335x EVM
DRAM: 256 MiB
NAND: 0 MiB
MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
*** Warning - bad CRC, using default environment

<ethaddr> not set. Validating first E-fuse MAC
Net:   cpsw, usb_ether
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc0 is current device
SD/MMC found on device 0
** Unable to read file boot.scr **
** Unable to read file uEnv.txt **
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
switch to partitions #0, OK
mmc0 is current device
SD/MMC found on device 0
3478016 bytes read in 322 ms (10.3 MiB/s)
37553 bytes read in 19 ms (1.9 MiB/s)
## Flattened Device Tree blob at 88000000
   Booting using the fdt blob at 0x88000000
   Loading Device Tree to 8df01000, end 8df0d2b0 ...
Starting kernel ...

1. I'm not understanding why my board in this current boot configuration, even though mmc2 is not present, it is trying to boot from MMC2 without going to MMC 1.

2. Second, When it is trying to boot from MMC1, why is is getting error -95?

I'm attaching our 5873.am335x_evm.h file for your reference.

Kindly help us to resolve this issue.

Regards, Vamsi

0 Andreas Dannenberg over 5 years ago in reply to Vamsi Siddhani

TI__Guru 69707 points

Vamsi,

Vamsi Siddhani said:
1. I'm not understanding why my board in this current boot configuration, even though mmc2 is not present, it is trying to boot from MMC2 without going to MMC 1.

Depending on the device the MMCx module names in our documentation (TRM), code (dts files), and debug prints (U-Boot) do not always match. In your case of AM335x it is as follows:

MMC1 (TRM) == MMC2 (U-Boot) == eMMC

MMC0 (TRM) == MMC1 (U-Boot) == SD Card

So the error you got 'Trying to boot from MMC2' is actually regarding reading from eMMC that fails, and we need to figure out why it is failing.

Vamsi Siddhani said:
2. Second, When it is trying to boot from MMC1, why is is getting error -95?

This is your SD card which is not inserted, so it's failing.

Can you double-check your U-Boot device tree configuration against what is used on the BeagleBone Black which has an SD card slot on 'mmc1 and an eMMC connected to 'mmc2'? Basically double-check your &mmc* device tree setup against arch/arm/dts/am335x-boneblack.dts (and it's hierarchy, namely am335x-bone-common.dtsi).

Regards, Andreas

0 Vamsi Siddhani over 5 years ago in reply to Andreas Dannenberg

Expert 1420 points

Andreas,

Our custom board is based on am335x-evm starter kit. This same configuration is working fine in our earlier version board. In the current version only it is causing this problem. I'm here attaching dts files of V3 and V4 for your reference.

Ver 3:

Fullscreen am335x-evmsk_v3.dts.txt Download

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/*
 * AM335x Starter Kit
 * http://www.ti.com/tool/tmdssk3358
 */

/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "TI AM335x EVM-SK";
	compatible = "ti,am335x-evmsk", "ti,am33xx";

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	chosen {
		stdout-path = &uart0;
	};

	vbat: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	lis3_reg: fixedregulator1 {
		compatible = "regulator-fixed";
		regulator-name = "lis3_reg";
		regulator-boot-on;
	};


	vtt_fixed: fixedregulator3 {
		compatible = "regulator-fixed";
		regulator-name = "vtt";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
	};

	//lcd_bl: backlight {
	//	compatible = "pwm-backlight";
	//	pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
	//	brightness-levels = <0 58 61 66 75 90 125 170 255>;
	//	default-brightness-level = <8>;
	//};
	
	//sound {
	//	compatible = "simple-audio-card";
	//	simple-audio-card,name = "AM335x-EVMSK";
	//	simple-audio-card,widgets =
	//		"Headphone", "Headphone Jack";
	//	simple-audio-card,routing =
	//		"Headphone Jack",	"HPLOUT",
	//		"Headphone Jack",	"HPROUT";
	//	simple-audio-card,format = "dsp_b";
	//	simple-audio-card,bitclock-master = <&sound_master>;
	//	simple-audio-card,frame-master = <&sound_master>;
	//	simple-audio-card,bitclock-inversion;

	//	simple-audio-card,cpu {
	//		sound-dai = <&mcasp1>;
	//	};

	//	sound_master: simple-audio-card,codec {
	//		sound-dai = <&tlv320aic3106>;
	//		system-clock-frequency = <24000000>;
	//	};
	//};

	//panel {
	//	compatible = "ti,tilcdc,panel";
	//	pinctrl-names = "default", "sleep";
		//pinctrl-0 = <&lcd_pins_default>;
		//pinctrl-1 = <&lcd_pins_sleep>;
		//backlight = <&lcd_bl>;
	//	status = "okay";
	//	panel-info {
	///		ac-bias		= <255>;
	//		ac-bias-intrpt	= <0>;
	//		dma-burst-sz	= <16>;
	//		bpp		= <32>;
	//		fdd		= <0x80>;
	//		sync-edge	= <0>;
	//		sync-ctrl	= <1>;
	//		raster-order	= <0>;
	//		fifo-th		= <0>;
	//	};
	//	display-timings {
	//		480x272 {
	//			hactive		= <480>;
	//			vactive		= <272>;
	//			hback-porch	= <43>;
	//			hfront-porch	= <8>;
	//			hsync-len	= <4>;
	//			vback-porch	= <12>;
	//			vfront-porch	= <4>;
	//			vsync-len	= <10>;
	//			clock-frequency = <9000000>;
	//			hsync-active	= <0>;
	//			vsync-active	= <0>;
	//		};
	//	};
	//};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&ddr3_vtt_toggle>;

	ddr3_vtt_toggle: ddr3_vtt_toggle {
		pinctrl-single,pins = <
			0x164 (PIN_OUTPUT | MUX_MODE7)	/* ecap0_in_pwm0_out.gpio0_7 */
		>;
	};

	//emmc_reset: emmc_reset {
          //      pinctrl-single,pins = <
            //            0x07c (PIN_OUTPUT_PULLUP | MUX_MODE7)   /* gpmc_csn0.mmc1_rstn */
              //  >;
        //};

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
		>;
	};

	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
		>;
	};

	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_ctsn.uart1_ctsn */
			AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* uart1_rtsn.uart1_rtsn */
			AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */
			AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_txd.uart1_txd */
		>;
	};

	uart4_pins: pinmux_uart4_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6)	/* gpmc_wait0.uart4_rxd */
			AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6)	/* gpmc_wpn.uart4_txd */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
			AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
			AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
			AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */

			/* Slave 2 */
			AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
			AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
			AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
			AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
			AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
			AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)

			/* Slave 2 reset value*/
			AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) 		/* spi0_cs1.gpio0_6 */
			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */
			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */
			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */
			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */
			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */
			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */
			//AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE7)		/* mcasp0_aclkr.mmc0_sdwp */
		>;
	};


	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1)	/* gpmc_ad0.mmc1_dat0 */
			AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn1.mmc1_clk */
			AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn2.mmc1_cmd */
			//AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad8.mmc1_dat0 */
			//AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad9.mmc1_dat1 */
			//AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad10.mmc1_dat2 */
			//AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad11.mmc1_dat3 */
			//AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad12.mmc1_dat4 */
			//AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad13.mmc1_dat5 */
			//AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad14.mmc1_dat6 */
			//AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad15.mmc1_dat7 */
			//AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn1.mmc1_clk */
			//AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn2.mmc1_cmd */
			//AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) 	/* gpmc_csn0.mmc1_rstn */
			//AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE7) 	/* gpmc_csn3.mmc1_ds */
		>;
	};	

	gpmc_pins: pinmux_gpmc_pins {
		pinctrl-single,pins = <
			//AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
			//AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad8.gpmc_ad8 */
			AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad9.mmc1_dat1 */
			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) 	/* gpmc_OEn_REn.gpmc_OEn_REn */
			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) 	/* gpmc_ADVn_ALE.gpmc_ADVn_ALE */
			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)	/* gpmc_BEn0_CLE.gpmc_BEn0_CLE */
			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)	/* GPMC_WEn.GPMC_WEn */
			//AM33XX_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE0)	/* gpmc_csn0 */
			//AM33XX_IOPAD(0x9B0, PIN_INPUT_PULLUP | MUX_MODE7)	/* XDMA_EVENT_INTR0.AM335X_LOC1 */
			//AM33XX_IOPAD(0x9B4, PIN_INPUT_PULLUP | MUX_MODE0)	/* XDMA_EVENT_INTR1.AM335X_LOC2 */
		>;
	};	
	
	spi0_pins: spi0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP  | MUX_MODE0) 	//spi0_sclk
			AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0) 		//spi0_d0
			AM33XX_IOPAD(0x958, PIN_INPUT  | MUX_MODE0)		//spi0_d1
			AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)	//spi0_cs0
		>;
	};

	spi1_pins: spi1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x908, PIN_INPUT | MUX_MODE2)	/* mii1_col.spi1_sclk */
			AM33XX_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE2)   	/* mii1_crs.spi1_d0 */
			AM33XX_IOPAD(0x910, PIN_INPUT | MUX_MODE2) 	/* mii1_rxerr.spi1_d1 */
			AM33XX_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3)	/* mcasp0_ahclkr.spi1_cs0 */
		>;
	};

};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;

	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_pins>;

	status = "okay";
};

&spi0 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&spi0_pins>;
    ti,pindir-d0-out-d1-in = <1>;

    spi_nor: flash@0 {
        #address-cells = <1>;
        #size-cells = <1>;
        #compatible = "jedec,spi-nor";
	compatible = "jedec,spi-nor";
        spi-max-frequency = <3000000>;
        m25p,fast-read;
        reg = <0>;

        //partition@0 {
            //label = "u-boot-spl";
            //reg = <0x0 0x80000>;
            ////read-only;
        //};

        //partition@1 {
            //label = "u-boot";
            //reg = <0x80000 0x100000>;
            ////read-only;
        //};

        //partition@2 {
            //label = "u-boot-env";
            //reg = <0x180000 0x20000>;
            ////read-only;
        //};

        partition@0 {
            label = "MasterSlaveWrite";
            //reg = <0x1A0000 0x1E60000>;
	    reg = <0x0 0x1E60000>;
        };
    };
};

&gpmc
{
	pinctrl-names = "default";
	pinctrl-0 = <&gpmc_pins>;
	ranges = <2 0 0x01000000 0x01000000>; /* fpga */
	status = "okay";
	fpga{
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <2 0 0x01000000>;
		bank-width = <2>;

		gpmc,sync-clk-ps=<0>; /* Minimum clock period for synchronous mode, in picoseconds */

		gpmc,cs-on-ns = <0>;		/* Assertion time */
		gpmc,cs-rd-off-ns = <10>;	/* Read deassertion time */
		gpmc,cs-wr-off-ns = <6>;	/* Write deassertion time */

		/* ADV signal timings (in nanoseconds) corresponding to GPMC_CONFIG3: */
		gpmc,adv-on-ns = <1>;		/* Assertion time */
		gpmc,adv-rd-off-ns = <1>;	/* Read deassertion time */
		gpmc,adv-wr-off-ns = <1>;	/* Write deassertion time */

		/* WE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4: */
		gpmc,we-on-ns = <1>;		/* Assertion time */
		gpmc,we-off-ns = <1>;		/* Deassertion time */

		/* OE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4: */
		gpmc,oe-on-ns = <3>;		/* Assertion time */
		gpmc,oe-off-ns = <10>;		/* Deassertion time */

		/* Access time and cycle time timings (in nanoseconds) corresponding to GPMC_CONFIG5: */
		gpmc,access-ns = <9>;			/* Start-cycle to first data valid delay */
		gpmc,page-burst-access-ns = <1>;	/* Multiple access word delay */
		gpmc,rd-cycle-ns = <9>;			/* Total read cycle time */
		gpmc,wr-cycle-ns = <6>;			/* Total write cycle time */


		gpmc,burst-length= <8>; 	//	Page/burst length. Must be 4, 8 or 16.
		gpmc,burst-wrap;		//	Enables wrap bursting
		gpmc,burst-read; 		//	Enables read page/burst mode
		gpmc,burst-write;		//	Enables write page/burst mode

		gpmc,device-width=<2>;/* Total width of device(s) connected to a GPMC chip-select in bytes. The GPMC supports 8-bit and 16-bit devices 						and so this property must be 1 or 2. */

		//gpmc,sync-read;
		//gpmc,sync-write;

	};
};

&spi1
{
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins>;
	ti,pindir-d0-out-d1-in = <1>;
	status = "okay";
	spidev@1
	{
		pinctrl-0 = <&spi1_pins>;
		compatible = "spidev";
		spi-max-frequency = <48000000>;
		reg = <0>;
	};
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	tps: tps@2d {
		reg = <0x2d>;
	};

	lis331dlh: lis331dlh@18 {
		compatible = "st,lis331dlh", "st,lis3lv02d";
		reg = <0x18>;
		Vdd-supply = <&lis3_reg>;
		Vdd_IO-supply = <&lis3_reg>;

		st,click-single-x;
		st,click-single-y;
		st,click-single-z;
		st,click-thresh-x = <10>;
		st,click-thresh-y = <10>;
		st,click-thresh-z = <10>;
		st,irq1-click;
		st,irq2-click;
		st,wakeup-x-lo;
		st,wakeup-x-hi;
		st,wakeup-y-lo;
		st,wakeup-y-hi;
		st,wakeup-z-lo;
		st,wakeup-z-hi;
		st,min-limit-x = <120>;
		st,min-limit-y = <120>;
		st,min-limit-z = <140>;
		st,max-limit-x = <550>;
		st,max-limit-y = <550>;
		st,max-limit-z = <750>;
	};

	tlv320aic3106: tlv320aic3106@1b {
		#sound-dai-cells = <0>;
		compatible = "ti,tlv320aic3106";
		reg = <0x1b>;
		status = "okay";

		/* Regulators */
		AVDD-supply = <&vaux2_reg>;
		IOVDD-supply = <&vaux2_reg>;
		DRVDD-supply = <&vaux2_reg>;
		DVDD-supply = <&vbat>;
	};
};

&usb {
	status = "disabled";
};

&usb_ctrl_mod {
	status = "disabled";
};

&usb0_phy {
	status = "disabled";
};

//&usb1_phy {
//	status = "disabled";
//};

&usb0 {
	status = "disabled";
};

//&usb1 {
//	status = "disabled";
//	dr_mode = "host";
//};

&cppi41dma  {
	status = "okay";
};

&epwmss2 {
	status = "okay";

	ecap2: ecap@48304100 {
		status = "okay";
		pinctrl-names = "default";
		//pinctrl-0 = <&ecap2_pins>;
	};
};

&wkup_m3_ipc {
	ti,needs-vtt-toggle;
	ti,vtt-gpio-pin = <7>;
	ti,scale-data-fw = "am335x-evm-scale-data.bin";
};

#include "tps65910.dtsi"

&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1351500>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
		};
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	dual_emac = <1>;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <5>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <2>;
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmc_reg>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	//cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

&sham {
	status = "okay";
};

&aes {
	status = "okay";
};

&gpio0 {
	status = "okay";
	ti,no-reset-on-init;
};

&mmc2 {
	status = "okay";
	vmmc-supply = <&vmmc_reg>;
	ti,non-removable;
	bus-width = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;

};

&tscadc {
	status = "okay";
	tsc {
		ti,wires = <4>;
		ti,x-plate-resistance = <200>;
		ti,coordinate-readouts = <5>;
		ti,wire-config = <0x00 0x11 0x22 0x33>;
	};
};

&lcdc {
	status = "okay";

	blue-and-red-wiring = "crossed";
};

&sgx {
	status = "okay";
};

&rtc {
	clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
	clock-names = "ext-clk", "int-clk";
};

&pruss_soc_bus {
	status = "okay";

	pruss: pruss@0 {
		status = "okay";
	};
};

Ver 4:

Fullscreen am335x-evmsk_v4.dts.txt Download

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/*
 * AM335x Starter Kit
 * http://www.ti.com/tool/tmdssk3358
 */

/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "TI AM335x EVM-SK";
	compatible = "ti,am335x-evmsk", "ti,am33xx";

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	chosen {
		stdout-path = &uart0;
	};

	vbat: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	lis3_reg: fixedregulator1 {
		compatible = "regulator-fixed";
		regulator-name = "lis3_reg";
		regulator-boot-on;
	};


	vtt_fixed: fixedregulator3 {
		compatible = "regulator-fixed";
		regulator-name = "vtt";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
	};

	//lcd_bl: backlight {
	//	compatible = "pwm-backlight";
	//	pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
	//	brightness-levels = <0 58 61 66 75 90 125 170 255>;
	//	default-brightness-level = <8>;
	//};
	
	//sound {
	//	compatible = "simple-audio-card";
	//	simple-audio-card,name = "AM335x-EVMSK";
	//	simple-audio-card,widgets =
	//		"Headphone", "Headphone Jack";
	//	simple-audio-card,routing =
	//		"Headphone Jack",	"HPLOUT",
	//		"Headphone Jack",	"HPROUT";
	//	simple-audio-card,format = "dsp_b";
	//	simple-audio-card,bitclock-master = <&sound_master>;
	//	simple-audio-card,frame-master = <&sound_master>;
	//	simple-audio-card,bitclock-inversion;

	//	simple-audio-card,cpu {
	//		sound-dai = <&mcasp1>;
	//	};

	//	sound_master: simple-audio-card,codec {
	//		sound-dai = <&tlv320aic3106>;
	//		system-clock-frequency = <24000000>;
	//	};
	//};

	//panel {
	//	compatible = "ti,tilcdc,panel";
	//	pinctrl-names = "default", "sleep";
		//pinctrl-0 = <&lcd_pins_default>;
		//pinctrl-1 = <&lcd_pins_sleep>;
		//backlight = <&lcd_bl>;
	//	status = "okay";
	//	panel-info {
	///		ac-bias		= <255>;
	//		ac-bias-intrpt	= <0>;
	//		dma-burst-sz	= <16>;
	//		bpp		= <32>;
	//		fdd		= <0x80>;
	//		sync-edge	= <0>;
	//		sync-ctrl	= <1>;
	//		raster-order	= <0>;
	//		fifo-th		= <0>;
	//	};
	//	display-timings {
	//		480x272 {
	//			hactive		= <480>;
	//			vactive		= <272>;
	//			hback-porch	= <43>;
	//			hfront-porch	= <8>;
	//			hsync-len	= <4>;
	//			vback-porch	= <12>;
	//			vfront-porch	= <4>;
	//			vsync-len	= <10>;
	//			clock-frequency = <9000000>;
	//			hsync-active	= <0>;
	//			vsync-active	= <0>;
	//		};
	//	};
	//};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&ddr3_vtt_toggle>;

	ddr3_vtt_toggle: ddr3_vtt_toggle {
		pinctrl-single,pins = <
			0x164 (PIN_OUTPUT | MUX_MODE7)	/* ecap0_in_pwm0_out.gpio0_7 */
		>;
	};

	//emmc_reset: emmc_reset {
          //      pinctrl-single,pins = <
            //            0x07c (PIN_OUTPUT_PULLUP | MUX_MODE7)   /* gpmc_csn0.mmc1_rstn */
              //  >;
        //};

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
		>;
	};

	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
		>;
	};

	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_ctsn.uart1_ctsn */
			AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* uart1_rtsn.uart1_rtsn */
			AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */
			AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_txd.uart1_txd */
		>;
	};

	uart4_pins: pinmux_uart4_pins {
		pinctrl-single,pins = <
			//AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6)	/* gpmc_wait0.uart4_rxd */
			//AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6)	/* gpmc_wpn.uart4_txd */
			AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE1)	/* uart0_ctsn.uart4_rxd */
			AM33XX_IOPAD(0x96C, PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* uart0_rtsn.uart4_txd */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
			AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
			AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
			AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */

			/* Slave 2 */
			AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
			AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
			AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
			AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
			AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
			AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)

			/* Slave 2 reset value*/
			AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) 		/* spi0_cs1.gpio0_6 */
			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */
			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */
			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */
			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */
			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */
			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */
			//AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE7)		/* mcasp0_aclkr.mmc0_sdwp */
		>;
	};


	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1)	/* gpmc_ad0.mmc1_dat0 */
			AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn1.mmc1_clk */
			AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn2.mmc1_cmd */
			//AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad8.mmc1_dat0 */
			//AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad9.mmc1_dat1 */
			//AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad10.mmc1_dat2 */
			//AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad11.mmc1_dat3 */
			//AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad12.mmc1_dat4 */
			//AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad13.mmc1_dat5 */
			//AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad14.mmc1_dat6 */
			//AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad15.mmc1_dat7 */
			//AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn1.mmc1_clk */
			//AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) 	/* gpmc_csn2.mmc1_cmd */
			//AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) 	/* gpmc_csn0.mmc1_rstn */
			//AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE7) 	/* gpmc_csn3.mmc1_ds */
		>;
	};	

	gpmc_pins: pinmux_gpmc_pins {
		pinctrl-single,pins = <
			//AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
			AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad8.gpmc_ad8 */
			//AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad9.mmc1_dat1 */
			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) 	/* gpmc_OEn_REn.gpmc_OEn_REn */
			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) 	/* gpmc_ADVn_ALE.gpmc_ADVn_ALE */
			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)	/* gpmc_BEn0_CLE.gpmc_BEn0_CLE */
			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)	/* GPMC_WEn.GPMC_WEn */
			//AM33XX_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE0)	/* gpmc_csn0 */
			//AM33XX_IOPAD(0x9B0, PIN_INPUT_PULLUP | MUX_MODE7)	/* XDMA_EVENT_INTR0.AM335X_LOC1 */
			//AM33XX_IOPAD(0x9B4, PIN_INPUT_PULLUP | MUX_MODE0)	/* XDMA_EVENT_INTR1.AM335X_LOC2 */
		>;
	};	
	
	spi0_pins: spi0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP  | MUX_MODE0) 	//spi0_sclk
			AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0) 		//spi0_d0
			AM33XX_IOPAD(0x958, PIN_INPUT  | MUX_MODE0)		//spi0_d1
			AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)	//spi0_cs0
		>;
	};

	spi1_pins: spi1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x908, PIN_INPUT | MUX_MODE2)	/* mii1_col.spi1_sclk */
			AM33XX_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE2)   	/* mii1_crs.spi1_d0 */
			AM33XX_IOPAD(0x910, PIN_INPUT | MUX_MODE2) 	/* mii1_rxerr.spi1_d1 */
			AM33XX_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3)	/* mcasp0_ahclkr.spi1_cs0 */
		>;
	};

};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;

	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_pins>;

	status = "okay";
};

&spi0 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&spi0_pins>;
    ti,pindir-d0-out-d1-in = <1>;

    spi_nor: flash@0 {
        #address-cells = <1>;
        #size-cells = <1>;
        #compatible = "jedec,spi-nor";
	compatible = "jedec,spi-nor";
        spi-max-frequency = <3000000>;
        m25p,fast-read;
        reg = <0>;

        //partition@0 {
            //label = "u-boot-spl";
            //reg = <0x0 0x80000>;
            ////read-only;
        //};

        //partition@1 {
            //label = "u-boot";
            //reg = <0x80000 0x100000>;
            ////read-only;
        //};

        //partition@2 {
            //label = "u-boot-env";
            //reg = <0x180000 0x20000>;
            ////read-only;
        //};

        partition@0 {
            label = "MasterSlaveWrite";
            //reg = <0x1A0000 0x1E60000>;
	    reg = <0x0 0x1E60000>;
        };
    };
};

&gpmc
{
	pinctrl-names = "default";
	pinctrl-0 = <&gpmc_pins>;
	ranges = <2 0 0x01000000 0x01000000>; /* fpga */
	status = "okay";
	fpga{
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <2 0 0x01000000>;
		bank-width = <2>;

		gpmc,sync-clk-ps=<0>; /* Minimum clock period for synchronous mode, in picoseconds */

		gpmc,cs-on-ns = <0>;		/* Assertion time */
		gpmc,cs-rd-off-ns = <10>;	/* Read deassertion time */
		gpmc,cs-wr-off-ns = <6>;	/* Write deassertion time */

		/* ADV signal timings (in nanoseconds) corresponding to GPMC_CONFIG3: */
		gpmc,adv-on-ns = <1>;		/* Assertion time */
		gpmc,adv-rd-off-ns = <1>;	/* Read deassertion time */
		gpmc,adv-wr-off-ns = <1>;	/* Write deassertion time */

		/* WE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4: */
		gpmc,we-on-ns = <1>;		/* Assertion time */
		gpmc,we-off-ns = <1>;		/* Deassertion time */

		/* OE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4: */
		gpmc,oe-on-ns = <3>;		/* Assertion time */
		gpmc,oe-off-ns = <10>;		/* Deassertion time */

		/* Access time and cycle time timings (in nanoseconds) corresponding to GPMC_CONFIG5: */
		gpmc,access-ns = <9>;			/* Start-cycle to first data valid delay */
		gpmc,page-burst-access-ns = <1>;	/* Multiple access word delay */
		gpmc,rd-cycle-ns = <9>;			/* Total read cycle time */
		gpmc,wr-cycle-ns = <6>;			/* Total write cycle time */


		gpmc,burst-length= <8>; 	//	Page/burst length. Must be 4, 8 or 16.
		gpmc,burst-wrap;		//	Enables wrap bursting
		gpmc,burst-read; 		//	Enables read page/burst mode
		gpmc,burst-write;		//	Enables write page/burst mode

		gpmc,device-width=<2>;/* Total width of device(s) connected to a GPMC chip-select in bytes. The GPMC supports 8-bit and 16-bit devices 						and so this property must be 1 or 2. */

		//gpmc,sync-read;
		//gpmc,sync-write;

	};
};

&spi1
{
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins>;
	ti,pindir-d0-out-d1-in = <1>;
	status = "okay";
	spidev@1
	{
		pinctrl-0 = <&spi1_pins>;
		compatible = "spidev";
		spi-max-frequency = <48000000>;
		reg = <0>;
	};
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	tps: tps@2d {
		reg = <0x2d>;
	};

	lis331dlh: lis331dlh@18 {
		compatible = "st,lis331dlh", "st,lis3lv02d";
		reg = <0x18>;
		Vdd-supply = <&lis3_reg>;
		Vdd_IO-supply = <&lis3_reg>;

		st,click-single-x;
		st,click-single-y;
		st,click-single-z;
		st,click-thresh-x = <10>;
		st,click-thresh-y = <10>;
		st,click-thresh-z = <10>;
		st,irq1-click;
		st,irq2-click;
		st,wakeup-x-lo;
		st,wakeup-x-hi;
		st,wakeup-y-lo;
		st,wakeup-y-hi;
		st,wakeup-z-lo;
		st,wakeup-z-hi;
		st,min-limit-x = <120>;
		st,min-limit-y = <120>;
		st,min-limit-z = <140>;
		st,max-limit-x = <550>;
		st,max-limit-y = <550>;
		st,max-limit-z = <750>;
	};

	tlv320aic3106: tlv320aic3106@1b {
		#sound-dai-cells = <0>;
		compatible = "ti,tlv320aic3106";
		reg = <0x1b>;
		status = "okay";

		/* Regulators */
		AVDD-supply = <&vaux2_reg>;
		IOVDD-supply = <&vaux2_reg>;
		DRVDD-supply = <&vaux2_reg>;
		DVDD-supply = <&vbat>;
	};
};

&usb {
	status = "disabled";
};

&usb_ctrl_mod {
	status = "disabled";
};

&usb0_phy {
	status = "disabled";
};

//&usb1_phy {
//	status = "disabled";
//};

&usb0 {
	status = "disabled";
};

//&usb1 {
//	status = "disabled";
//	dr_mode = "host";
//};

&cppi41dma  {
	status = "okay";
};

&epwmss2 {
	status = "okay";

	ecap2: ecap@48304100 {
		status = "okay";
		pinctrl-names = "default";
		//pinctrl-0 = <&ecap2_pins>;
	};
};

&wkup_m3_ipc {
	ti,needs-vtt-toggle;
	ti,vtt-gpio-pin = <7>;
	ti,scale-data-fw = "am335x-evm-scale-data.bin";
};

#include "tps65910.dtsi"

&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1351500>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
		};
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	dual_emac = <1>;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <5>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <2>;
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmc_reg>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	//cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

&sham {
	status = "okay";
};

&aes {
	status = "okay";
};

&gpio0 {
	status = "okay";
	ti,no-reset-on-init;
};

&mmc2 {
	status = "okay";
	vmmc-supply = <&vmmc_reg>;
	ti,non-removable;
	bus-width = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;

};

&tscadc {
	status = "okay";
	tsc {
		ti,wires = <4>;
		ti,x-plate-resistance = <200>;
		ti,coordinate-readouts = <5>;
		ti,wire-config = <0x00 0x11 0x22 0x33>;
	};
};

&lcdc {
	status = "okay";

	blue-and-red-wiring = "crossed";
};

&sgx {
	status = "okay";
};

&rtc {
	clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
	clock-names = "ext-clk", "int-clk";
};

&pruss_soc_bus {
	status = "okay";

	pruss: pruss@0 {
		status = "okay";
	};
};

Diff between the above 2 files:

Fullscreen diff_v4_v3.txt Download

172,175c172,173
< 			//AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6)	/* gpmc_wait0.uart4_rxd */
< 			//AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6)	/* gpmc_wpn.uart4_txd */
< 			AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE1)	/* uart0_ctsn.uart4_rxd */
< 			AM33XX_IOPAD(0x96C, PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* uart0_rtsn.uart4_txd */
---
> 			AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6)	/* gpmc_wait0.uart4_rxd */
> 			AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6)	/* gpmc_wpn.uart4_txd */
303,304c301,302
< 			AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad8.gpmc_ad8 */
< 			//AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad9.mmc1_dat1 */
---
> 			//AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad8.gpmc_ad8 */
> 			AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad9.mmc1_dat1 */

Please help us in this regard.

Thanks & Regards, Vamsi.

0 Vamsi Siddhani over 5 years ago in reply to Vamsi Siddhani

Expert 1420 points

Hi Andreas,

I've been waiting for your reply for so long. I've verified my u-boot configuration file. MMC1 is used for SD and MMC2 is used for eMMC and addresses of all the pins I've verified.

Still, we are unable to proceed further.

Kindly help us.

Regards, Vamsi

0 Andreas Dannenberg over 5 years ago in reply to Vamsi Siddhani

TI__Guru 69707 points

Vamsi,

your earlier post explained you had a previous version of your board that worked. And the current version exhibits the issues you described.

So my question is, what are the exact(!) hardware changes between your two versions of the board?

Also for U-Boot on AM335x you'll actually need to update the pinmux in the board-specific mux.c file, as the data from the device tree is not used in case of building for one of the AM335x-based TI EVMs. Did you make any updates to this file?

https://git.ti.com/cgit/processor-sdk/processor-sdk-u-boot/tree/board/ti/am335x/mux.c?h=processor-sdk-u-boot-2019.01

Regards, Andreas

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