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TDA2SX: EVE2 and EVE1 Memory Layout

Samridha Kumar
Prodigy 120 points
Part Number: TDA2SX

Hello,

I am using two EVE cores in an application. Both EVE cores are supposed to run in parallel. However the .map files for both EVE core has same memory addresses for the internal EVE buffers. Is it fine? As per my knowledge, memory footprint is SoC based and as such each EVE will have different memory layout.

Following is the memory layout for both the EVEs:

******************************************************************************
ARP32 Linker PC v1.0.8
******************************************************************************
>> Linked Wed Feb 12 09:46:36 2020

OUTPUT FILE NAME: <_out/liqor_sim_hil_out_ti_arp32_1_target.elf>
ENTRY POINT SYMBOL: "_reset_handler" address: 80000100


MEMORY CONFIGURATION

name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
PAGE 0:
L3MEM 40300000 00080000 00000004 0007fffc RWIX
VECMEM 80000000 00000100 00000028 000000d8 RWIX
CMDMEM 80000100 00001000 00000058 00000fa8 RWIX
EXTMEM 80101100 00100000 000209cc 000df634 RWIX
DDR3_SHARED_EVE 81030000 00fd0000 00080404 00f4fbfc RWIX

PAGE 1:
DATMEM 40020000 00008000 00007414 00000bec RWIX
WMEM 40040000 0000ffe0 00000000 0000ffe0 RWIX
IMEMLA 40050000 00004000 00000000 00004000 RWIX
IMEMHA 40054000 00004000 00000000 00004000 RWIX
IMEMLB 40070000 00004000 00000000 00004000 RWIX
IMEMHB 40074000 00004000 00000000 00004000 RWIX
L3MEM_OCMC3_1 40500000 00000400 00000000 00000400 RWIX
L3MEM_OCMC3_2 40500400 0003a000 00000000 0003a000 RWIX
GEM0_L2_MEM 40800000 00008000 00000000 00008000 RWIX
EXTDMEM 80040000 01000000 000b0454 00f4fbac RWIX

******************************************************************************
ARP32 Linker PC v1.0.8
******************************************************************************
>> Linked Wed Feb 12 09:46:17 2020

OUTPUT FILE NAME: <_out/liqor_sim_hil_out_ti_arp32_0_target.elf>
ENTRY POINT SYMBOL: "_reset_handler" address: 80000100


MEMORY CONFIGURATION

name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
PAGE 0:
L3MEM 40300000 00080000 00000004 0007fffc RWIX
VECMEM 80000000 00000100 00000028 000000d8 RWIX
CMDMEM 80000100 00001000 00000058 00000fa8 RWIX
EXTMEM 80001100 00100000 000268fc 000d9704 RWIX
DDR3_SHARED_EVE 81030000 00fd0000 00080404 00f4fbfc RWIX

PAGE 1:
DATMEM 40020000 00008000 00007414 00000bec RWIX
WMEM 40040000 0000ffe0 00000000 0000ffe0 RWIX
IMEMLA 40050000 00004000 00000000 00004000 RWIX
IMEMHA 40054000 00004000 00000000 00004000 RWIX
IMEMLB 40070000 00004000 00000000 00004000 RWIX
IMEMHB 40074000 00004000 00000000 00004000 RWIX
L3MEM_OCMC3_1 40500000 00000400 00000000 00000400 RWIX
L3MEM_OCMC3_2 40500400 0003a000 00000000 0003a000 RWIX
GEM0_L2_MEM 40800000 00008000 00000000 00008000 RWIX
EXTDMEM 80040000 01000000 000b0478 00f4fb88 RWIX

Please respond quickly. 

  • 0
    TI__Expert 6335 points

    Yes it is fine as memory maps are local to each core. Each EVE has its own image buffers and their local addresses are the same. Otherwise we would have to have different *.out files for each EVE, which would be impractical.

    From the ARM, each EVE's buffer would be at different addresses since ARM has a global view of the system. 

    regards,

    Victor

  • 0 in reply to Victor Cheng
    Prodigy 120 points

    Thanks Victor for your reply. I am using two different .out(s) for both the EVE cores, and its running fine now, though the memory map for both the cores is the same I posted.