AM6548: R5F L1 cache configuration

Hello HaTa,

this is handled by the MPU of the R5f.

Do you really need an API to change configuration at runtime, or do you want to statically configure this at startup?

In the xdc config file of your application you can configure the MPU regions. Look for mpu.xs files in the processor SDK files for example.

Regards,

Dominic

Hi HaTa, Dominic,

For bare-metal (CSL), you can configure the MPU at startup (including cache settings) as described in the file <PDK>\packages\ti\csl\arch\r5\csl_arm_r5_mpu.h:

/**
 *  \addtogroup CSL_ARM_R5_MPU_DATASTRUCT
 *  @{
 */
/**
 * \brief  Structure containing the region configuration parameters.
 *         If application wants to do it's own MPU region configuration
 *         (override the default one), then it needs to define this variable
 *         and initialize that to desired values:
 *         Var: 'const CSL_ArmR5MpuRegionCfg gCslR5MpuCfg[CSL_ARM_R5F_MPU_REGIONS_MAX]'
 *         With above application can have it's own MPU configuration, but
 *         MPU configuration will still happen at boot/startup time.
 *         Default configurations for MPU regions is present under file:
 *         "\src\startup\startup.c"
 */

Regards,
Frank