Other Parts Discussed in Thread: OMAP-L138
Our setup combines an OMAP-L138 with an FPGA. The FPGA is periodically sending chunks of data to the OMAP over the UPP link. The DSP handles that data, does some processing with it, and then stores it to a larger buffer in shared memory. When we've got a full buffer of pre-processed data, the ARM does some further work with it. Pretty standard stuff. With the amount of data to be stored, I'm wanting to put this buffer in our external DDR RAM.
My problem is getting the data into the external DDR RAM efficiently. Manually copying a word at a time works but is slow, so I would like to use a manually triggered DMA transfer and let the rest of my code keep working while the transfer runs in the background. Again, very standard stuff. My problem is that this DMA transfer does not work, even though it's configured the same as other similar DMA transfers I've set up before.
I'm allocating one DMA channel at startup (using the EDMA driver with controller 0), and then changing the PaRaM set each time to put the chunk of data in the right place in the destination buffer. If I run DMA transfers to a buffer in DSP L2 RAM, or in the shared internal L3 RAM, the DMA transfer works perfectly. Running DMA transfers to a buffer in the external RAM though, this does not work. Some transfers do seem to copy data, although it doesn't look like the correct data. Some transfers simply don't do anything. And some transfers seem to only copy partial data, which is particularly confusing. Copying the data in code works perfectly too, although it's slow, so the problem clearly is just with the DMA transfer to external RAM.
I'm only trying to transfer 256 bytes of data (64 words) per DMA transfer. Using code to copy the data directly to the external RAM buffer takes approximately 6us (with data coming in every 20us). I would definitely expect DMA to run its transfer at least that fast, and there is enough slack in the timings anyway, so I don't think I'm overrunning the DMA channel.
I've seen some mention in the docs about "regions" for DMA, although it's not clear how that works. As far as I can make out from the EDMA drivers, the ARM is one region and the DSP is another, and I can't see anything which would block the external RAM from being used.
I've also tried using the cache writeback function, and disabling caching for external RAM using the MARxxx registers. Neither made a difference to this issue.
Does anyone have any suggestions about what I might need to do to fix these EDMA transfers to external RAM? Is there some issue with which DMA controller I use, or address mapping, or caching? All ideas gratefully appreciated! Like I said, I've tested as much as I can to isolate that the problem is purely with EDMA accessing external RAM, but I can't find anything in the TI docs which would suggest why that's happening.
