• State Resolved
  • Locked Locked
  • Replies 10 replies
  • Subscribers 97 subscribers
  • Views 522 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA3XEVM: [TDA3X][DSS]:What is the state of data during HSYNC blanking time?

vineel kumar
Prodigy 130 points
Part Number: TDA3XEVM


We are sending data alternatrively 0x000000 and 0xFFFFFF on each line. Figure displays the Hsync against a data line , As per our understanding the data during Horizontal balnking time is don't care, but we are getting the expected next line data. Is this behavior normal or should the data line be pulled to low, if so where should we configure in DSS. 

Horizontal blanking time includes 1.48us+0.539us+2.98us(Horizontal front porch+ Horizontal Sync time + Horizontal Back Porch) during which the state of data line(D16). Need some clarification on the state of data line during this Hsync Blanking time.

Note: We are using RGB24,1280x720 resolution image, and the pixel clock is configured to 74.25MHz according to the VESA TIMING STD(Version 1.0,Revision 12p, Draft 3)

  • 0
    TI__Guru**** 484385 points

    Hi Vineel Kumar,

    DSS sends fixed data during blanking, i think, it is 0x0 for luma and 0x80 for chroma.. Are you observing this data?

    Rgds,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 130 points

    Hi

    Thanks  for  your response.

    We are not getting both luma-0x00 or chroma-ox80 data during the blanking time, Instead the data line switches to the future data given which is 0x000000 and 0xFFFFFF sent on each alternate lines. Please refer the previous attachment for the waveforms.

    Regards,

    Vineel Kumar

  • 0 in reply to vineel kumar
    TI__Guru**** 484385 points

    Hi Vineel Kumar,

    Is HS/VS inverted in your DSS configuration? If they are inverted, it is possible that you get valid data when HS/VS is high.

    Rgds,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 130 points

    Dear Team,

     

    We think you understood in different way. Please refer below points for understanding of our query.

     

    We are working on DSS driver as proof of concept. We are enabling parallel CMOS output (Not VENC output mode).

    We have configured DSS in RGB24 format and transferring 0xFF and 0x00 data for alternative lines. And observing data for D16 pin on oscilloscope.

    We have question that during Blanking time (HFP+HSYNC+HBP) what is the data we can expect on any PIN (D16 to D23).

    1) Is the all pins pulled to low?

    2) Is all the pins pulled to high?

    3) Does it start transferring next line data? We are getting this data for our case. Please refer to initial post attachment(screenshot)

    4) If we want to achieve the pulling data to low then may we know where can we configure (register)?

     

    Thanks,

    Vineel Kumar

  • 0 in reply to vineel kumar
    TI__Guru**** 484385 points

    Hi Vineel Kumar,

    DSS will send blank color in the blanking area. which is value 0x0 for RGB components..  It will send this data only during blanking area.. 

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 130 points

    Hi,

    The value 0x00 during the Blank period is not observed in our case, we have tried all the possible configurations. Are there any specific configuration to be done to achieve 0x00 on the data line during hsync blanking time? if yes, please let us know. 

    Thank you,

    Sai Vineel

  • 0 in reply to vineel kumar
    TI__Guru**** 484385 points

    Hi Vinnel,

    No, blanking data is not configurable. It is fixed. Can you try capturing data for multiple lines and check the data? 

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 130 points

    Hi Brijesh,

     Thank you for your reply.

     

     We have observed data for all output lines during HSYNC blanking period. We are unable to see 0x00 on data lines instead able to see next line data only as in prev image.

     As per below screenshot, We are understanding that DE pin is disabled during Hsync blank period. So LCD display will ignore DOUT[23:0] during blank period. Even screenshot not depicting any 0x00 data for blanking period. So as per this DOUT[23:0] can be any data not only 0x00 during blank period.Please confirm.

    Regards

    Sai Vineel.M

  • 0 in reply to vineel kumar
    TI__Guru**** 484385 points

    Hi Sai Vineel,

    Are you seeing any issue with blanking data to be non-zero? I am not able to get what issue are facing. 

    Is the LCD able to detect DE and VS signals correctly and able to display input frames? 

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 130 points

    Hi,

    Currently the activity is on hold. We will reopen the post once we start working on the same. Hence closing now.

    Regards

    Saivineel.M