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TDA4VMXEVM: TDA4VMx evaluation module

Frank Huang2
Prodigy 30 points

Part Number: TDA4VMXEVM

Hi,

I want to know if this evaluation module could support to run HyperRAM.

If yes, after we buy the evaluation module, how should I do to make it work ?

Thank you.

Regards,

Frank

  • 0
    TI__Mastermind 42515 points

    Hi Frank,

    please check section "4.8.2 OSPI Interface" in J7EVM User's Guide:

    Regards,

    Yordan

  • 0 in reply to Yordan Kamenov
    Prodigy 30 points

    Hi Yordan, 

    Thank you very much for your help.   

    According to the document, it supports a MCP part -- HyperFlash + HyperRAM. 

    I can't tell the functionality or the role of this MCP part in the module. Does the system access this MCP's HyperFlash and HyerRAM ?

    If I remove this part from the module, would the system still be able to power on and work ? 

    Further more, if I want to replace this MCP part with a pure HyperRAM part,  would it work with or without system code modification ?  

    Best Regards, 

    Frank

  • 0 in reply to Frank Huang2
    TI__Mastermind 24980 points

    Hi Frank,

     

    If I remove this part from the module, would the system still be able to power on and work ?

    Yes, this part is optional and for evaluation. System can be booted from OSPI or other flash device.

    Further more, if I want to replace this MCP part with a pure HyperRAM part,  would it work with or without system code modification ? 

    Obviously high-level software must 'know' that HyperRAM is connected which is a volatile memory and contents will be lost after power losses.

    HyperRAM low-level access is slightly different than Hyperflash. Please refer to TRM section 12.3.3.5 HyperBus Programming Guide

    The Hyperbus driver, however, must be addressing  this already.  OS and high-level software will only perform read/write operations from/to SoC's FSS address space.

    Hyperbus driver must be configured for HyperRAM by user. For example, the driver will modify the following register bit at startup:

    MCU_FSS0_HPB0_MC_MCR_y[4] DEVTYPE

    Device Type
    Device type for control target.
    0h = HyperFlash
    1h = HyperRAM

    Regards,

    Stan

  • 0 in reply to Stanislav Stilyanov
    Prodigy 30 points

    Hi Stan, 

    Thanks a lot for your help.  That did provide us more confidence to use this EVM.  :) 

    Kindly allow me to ask more. 

    Does the processor SDK (https://www.ti.com/tool/PROCESSOR-SDK-DRA8X-TDA4X) includes the high-level software code and the Hyperbus driver ? 

    To perform the HyperRAM read/write, is any sample code or reference code included, too? 

    Frank

  • 0 in reply to Frank Huang2
    TI__Intellectual 2440 points

    Hi Frank,

    The HyperBus interface is not functional on J7ES. This will be documented in the next errata.

    Thanks,

    David