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AM5728: Errata i809 Workaround

Hideaki Matsumoto
Genius 9050 points
Part Number: AM5728

Hi,

My customer would like to confirm when to apply a workaround of i809.

Errata i809 in AM572x Silicon Errata (SPRZ429L) describes as “the command may not complete due to an internal receive FIFO overflow condition."

They're understanding this description as follows;

When this phenomenon happened, an interrupt (MPU_IRQ_54 = SATA_IRQ) which is waiting for command completion can’t occur or can’t occur within expected time.

Is their understanding correct ?

They should judge as this errata occurred if an interrupt timed out for waiting for command completion, then a workaround should be applied.

Is this correct ?

Regards,
Hideaki

  • 0
    TI__Genius 16906 points

    The TRM says the following about the Device to Host Register FIS Interrupt:

    "This status event indicates that a D2H Register FIS is received with the I bit set and copied to system memory."

    Therefore, the interrupt will not occur until the FIS is copied to system memory, which will not happen in case of a FIFO overflow condition.  So I agree that your understanding is correct.