Hi all,
I have some questions during read ePWM datasheet.
1. When ePWM1 is as a master and ePWM2 as a slave. ePWM1's SyncOut is set when counter is ZERO and connected with ePWM2's SyncIn. ePWM2's phase is set to ZERO. In this setting whether ePWM2's counter is same as ePWM1 or one TBCLK cycle delay?
2. How many cycles delay from event trigger to SOC, eg, if the SOC condition is counter is ZERO, how many TBCLK cycles delay from counter is ZERO to real SOC (start-of-conversion)?
Thanks in advance.