Part Number: PROCESSOR-SDK-DRA8X-TDA4X
Dear Experts:
Release Notes of SDK 06.02.00 says QSGMII mode is supported, and there is a new test case called 'CPSW9G QSGMII Switching test' in psdk_rtos_auto_j7_06_02_00_21/pdk/packages/ti/drv/cpsw/unit_test/test_framework/cpsw_testconfig.h.
I build the cpsw_unit_testapp_mcu2_0_debug.xer5f and load it through CCS, but I got no luck, the four ports on ENET EXP do not switch data packets at all, there is no packet comes from ENET EXP board.
But cable link detect is fine.
Is there any software or hardware modification required to make the QSGMII work well on ENET EXP?
Below is the UART log:
GESI board detected
QSGMII board detected
===============
CPSW Test Select
===============
Current/Default System Settings:
------------------------
Uart timemout : 10000 msec
Default Iteration count : 1
1: Manual testing (select specific test case to run)
s: System Settings
q: Quit
Enter Choice:
1
Manual testing
--------------------------------------
Select test to run as per below table:
--------------------------------------
1: CPSW9G Switching test
2: ALE auto learn test
3: ALE auto learn VLAN test
4: Mac speed test
5: Statistics test
6: VLAN test
8: CRC strip test
9: FIFO stats test
10: ALE source address update
11: ALE Table full
12: VLAN drop untagged
13: Multicast support
14: Policer test
15: Network security test
16: Host port Rx Filter
17: policer no match red drop enable test
18: policer no match yellow drop enable test
19: policer no match unregulated traffic test
20: Intervlan test
21: Default priority
22: Port VLAN ID
23: Sanity Test
24: Outer VLAN Test
25: Traffic shaping Test
26: 1-Gbps Full-Duplex Auto-Neg Test
27: 100-Mbps Full-Duplex Auto-Neg Test
28: 100-Mbps Half-Duplex Auto-Neg Test
29: DMA RxFlow Mtu Test
30: PHY Strap mode Test
31: Priority Regeneration
32: SGMII 1G Digital loopback
33: SGMII 1G FIFO Loopback
34: CPSW9G QSGMII Switching test
35: CPSW9G All ports Switching test
36: CPTS Event Test
37: BCAST MCAST Rate Limit
Enter Test to Run (Use UART1 console for all cores or MCU_UART1 console for MCU)
34
34
|TEST START|:: 34 ::
|TEST NAME| :: CPSW9G QSGMII Switching test ::
|TEST INFO| :: Num Tasks : 1 ::
|TEST INFO| :: Data Check : Disabled ::
|TEST INFO| :: Profiling : Disabled ::
|TEST INFO| :: Print : Disabled ::
|TEST INFO| :: Run Instructions : Use QSGMII ports for switching packets ::
|TEST ITEARATION NUMBER| :: : 1 ::
Enabling clocks for CPSW_9G!
CPSW_9G Test on MAIN NAVSS
CpswPhy_bindDriver: PHY 16: OUI:0001c1 Model:27 Ver:00 <-> 'vsc8514' : OK
CpswPhy_bindDriver: PHY 17: OUI:0001c1 Model:27 Ver:00 <-> 'vsc8514' : OK
CpswPhy_bindDriver: PHY 18: OUI:0001c1 Model:27 Ver:00 <-> 'vsc8514' : OK
CpswPhy_bindDriver: PHY 19: OUI:0001c1 Model:27 Ver:00 <-> 'vsc8514' : OK
initQs() txFreePktInfoQ initialized with 1000 pkts
Host MAC address: 70:ff:76:1d:95:2e
PHY 16 is alive
PHY 17 is alive
PHY 18 is alive
PHY 19 is alive
Waiting for PHY link on enabled ports mask:0x72
CpswMacPort_enablePort: SGMII Link Parter Config port 6: Link Up: 1-Gbps Full-Duplex
Cpsw_handleLinkUp: port 6: Link up: 1-Gbps Full-Duplex
MAC Port 6: link up
CpswMacPort_enablePort: SGMII Link Parter Config port 4: Link Up: 100-Mbps Full-Duplex
Cpsw_handleLinkUp: port 4: Link up: 100-Mbps Full-Duplex
MAC Port 4: link up
CpswMacPort_enablePort: SGMII Link Parter Config port 5: Link Up: 100-Mbps Full-Duplex
Cpsw_handleLinkUp: port 5: Link up: 100-Mbps Full-Duplex
MAC Port 5: link up
Waiting for PORT link on enabled ports
CpswMacPort_enablePort: SGMII Link Parter Config port 1: Link Up: 100-Mbps Full-Duplex
Cpsw_handleLinkUp: port 1: Link up: 100-Mbps Full-Duplex
MAC Port 1: link up
Receive Complete:CpswTestCommon_recvTask,Id:0,Frame:20
U-Boot log, in case you want to know version of my EVM board
U-Boot SPL 2019.01-g350f3927b8 (Feb 17 2020 - 09:46:23 +0000) SYSFW ABI: 2.9 (firmware rev 0x0013 '19.12.1-v2019.12a (Terrific Lla') Trying to boot from MMC2 Loading Environment from MMC... *** Warning - No MMC card found, using default environment Remoteproc 2 started successfully Starting ATF on ARM64 core... NOTICE: BL31: v2.2(release):ti2019.05-rc1 NOTICE: BL31: Built : 09:32:00, Feb 17 2020 I/TC: I/TC: OP-TEE version: ti2019.05-rc1-dev (gcc version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36))) #1 Mon Feb 17 09:40:16 UTC 2020 aarch64 I/TC: Initialized U-Boot SPL 2019.01-g350f3927b8 (Feb 17 2020 - 09:48:06 +0000) Detected: J7X-BASE-CPB rev E3 Detected: J7X-GESI-EXP rev E3 Detected: J7X-VSC8514-ETH rev E2 Trying to boot from MMC2 U-Boot 2019.01-g350f3927b8 (Feb 17 2020 - 09:48:06 +0000) SoC: J721E PG 1.0 Model: Texas Instruments K3 J721E SoC Board: J721EX-PM2-SOM rev E7 DRAM: 4 GiB Flash: 0 Bytes MMC: sdhci@4f80000: 0, sdhci@4fb0000: 1 Loading Environment from MMC... OK In: serial@2800000 Out: serial@2800000 Err: serial@2800000 Timed out in wait_for_event: status=1000 Check if pads/pull-ups of bus are properly configured Timed out in wait_for_bb: status=1000 Timed out in wait_for_bb: status=1000 Net: eth0: ethernet@046000000 Hit any key to stop autoboot: 0
