Hello
Would there be any impact on usable DDR BW,if ECC (SECDED) is enabled ?
Our configuration:
TDA2HG,
Dual EMIF @ 512MHz
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Hello
Would there be any impact on usable DDR BW,if ECC (SECDED) is enabled ?
Our configuration:
TDA2HG,
Dual EMIF @ 512MHz
Hi,
Please see if section 17.5 of the following document answers your question.
http://www.ti.com/lit/an/sprac21a/sprac21a.pdf
Thanks,
Kevin