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1808 Boundary Scan

john kaldunski
Prodigy 110 points

From the data sheet:

 

6.11.3.12 MDDR/DDR2 Boundary Scan Limitations

Due to DDR implementation and timing restrictions, it was not possible to place boundary scan cells

between core logic and the IO like boundary scan cells for other IO. Instead, the boundary scan cells are

tapped-off to the DDR PHY and there is the equivalent of a multiplexer inside the DDR PHY which selects

between functional and boundary scan paths.

The implication for boundary scan is that the DDR pins will not support the SAMPLE function of the output

enable cells on the DDR pins and this is a violation of IEEE 1149.1. Full EXTEST and PRELOAD

capability is still available.

 

I’m not fully up to speed on boundary scan testing, what impact does this have on real world testability?

  • 0
    TI__Expert 3540 points

    The SAMPLE/PRELOAD (joint instruction) does two things at the same time: it preloads the scan chain for the EXTEST commands that will follow and it samples the existing values of things in the boundary scan chain. For inputs, the SAMPLE function will capture the state of the input pins. For outputs or output enables, the SAMPLE function captures the current programmed state for the boundary scan outputs (even though they may be be actually driven at that point).

    The limitation mentioned here is that the scan chain cannot capture the output enable cells on the DDR interface. This should be only a minor impact on testability. The SAMPLE instruction works fully on all other pins.