TDA4VM: how to expand c7x memory

Beyond the 2GB limit the addresses become 64-bit, so only 64-bit processors like A72 and C7x DSP can natively access that space. Currently this is not tested and we'd like to keep all RTOS running cores to < 2GB.

In the next release of SDK (6.2) we have reshuffled the memory map so that TIDL gets a lion share of > 350MB.

How big is your network? and how much memory do you need?

Regards,
Shyam

I use import tool to import tensorflow pb file, the 120mb network bin file was generated.

and I try to adjust C7x memory size，but only expand the 350mb memory.

These memory can't not run tensorflow model.

We can run the onnx model as optional, but we eager to know how to expand more C7x memory,such as 1GB?

Thanks for your reply. (*^_^*)

Best regards,

johnny

Johnny,

I need to try this out myself before I can recommend how to allocate 1GB for TIDL. Allocating this huge space in 64-bit address space is not verified yet.

Will see if I can try this week and let you know.

Regards,
Shyam

Thanks a lot.

I'll wait for your  reply.  

Best regard,

Johnny

Hi Johnny,

On J7ES evm the lower 2GB is from address 0x0000_8000_0000 to 0x0000_FFFF_FFFF and the upper 2GB is from 0x0008_8000_0000 to 0x0008_FFFF_FFFF. As you can see the upper 2GB is not contiguous to lower 2GB. This poses a challenge as the C7x assembler expects all the data/code sections to be within +/- 2GB range. The code, shared memory and other sections kept in lower 2GB and C7x heap of 1GB in upper 2GB section throws an assembler error as it does not allow to fall in +/- 2GB range. We are discussing how to get around this issue but this will take some time.

Can you please let us know the use-case which requires 1GB of C7x heap and justify why the 512MB heap in the lower 2GB dedicated for C7x is not sufficient.

Regards,
Shyam

we will check a new firmware in this week. If it is not useful, I will ask your help for next week. thanks for your reply.

Best regard,

Johnny