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EMAC transmit problems

Hugh Brown
Prodigy 20 points

I am still having problems with the L137/8 EMAC and the queuing of transmit descriptors. If I transmit a message that only utilizes one descriptor, all is well, but if I transmit a message that contains more that one buffer/descriptor, the first buffer gets transmitted, but the second one isn’t. I check to see whether the previous descriptor has the EOQ bit set, and if so, I write the address of the new descriptor to the HDP register. If the EOQ bit isn’t set, I just update the pointer of the previous descriptor to point to the new descriptor, but this doesn’t seem to work. I end up with the EOQ bit set in the first buffer descriptor, but the second buffer descriptor still has the ownership bit set and isn’t transmitted.

Once the hardware reads the first descriptor, does the hardware read the descriptor again when the EOQ bit is set to see if the next pointer has been updated? Are there any caching issues that I should know about? Any help would be appreciated.

 

Thanks, Hugh.


  • 0
    TI__Expert 8250 points

    Hugh

    You definitely need to take care of cache coherency in your implementation as the updates to the descriptor must be flushed to memory(if it is mapped as  cachable region) -  the buffer descriptors are concurrently accessed/updated by the DMA engine

     

    Also, i suggest that you first enqueue the additional descriptor to the tail of the current running list(by updating the next pointer of the descriptor at the  tail) and then check for if EOQ bit is set  and if so, also write the the last enqueued buffer descriptor to the Tx HDP to re-trigger the transfe

     

    Regards

    Sriram

  • 0 in reply to Srirama Govindarajan
    Prodigy 20 points

    Sriram,

     

    Just make sure that I understand your explanation, if I enqueue descriptor 1 and write its address into the HDP register and then enqueue descriptor 2 and write the address of descriptor 2 into descriptor 1's next field, do I then re-write descriptor 1's address into the HDP register or descriptor 2's address?

     

    Thanks, Hugh.

     

  • 0 in reply to Hugh Brown
    TI__Expert 8250 points

    Hugh

    Suggested sequence would be

    1. Enqueue descriptor 1 and write its address into HDP
    2. Enqueue descriptor 2 and write its address in the next field of descriptor 1(tail of the list)
    3. Check whether EOQ is set in descriptor1 (tail of the list)
      1. If EOQ is set , then re-trigger the transfer by then writing descriptor 2 to Tx HDP

    Regards

    Sriram