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AM3352: Porting LCD from fbdev to DRM

Part Number: AM3352

Hello,

we have an am3352 based system with an CMOS LCD compatible system like discriped below (480x272 range, 8 bits per color channel):

https://processors.wiki.ti.com/index.php/LCD_connectivity#Connection_to_Parallel_CMOS_LCDs

The display works fine with the old setup  fbdev with linux kernel 3.1 using the &lcdc driver "ti,am33xx-tilcdc".

Now after switching over to Linux Kernel 4.4 an DRM driver is used by default and the display is not working anymore. Only the backlight seems to work, the display is with. There semms to be send Data over the data lines but with an other timing. We don't touch the hardware and the old setup with kernel 3 and fbev is still working by using the same pin-muxing.

DRM is active in the Kernel and FBDEV is deactivated liked discriped following the next link. I also added an "ti,tilcdc,panel" node and changed the lcdc node like discriped.

http://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components/Kernel/Kernel_Drivers/Display/LCDC.html

Like described above or the post below, I tried to switch back to FDDEV by changing the Kernel configuration, skipping (commenting out) the panel node and change back the "ti,am33xx-tilcdc" node (like. setting the old display timings here). Going this way no /dev/fb0 framebuffer is aviable anymore.

e2e.ti.com/.../1997116

Does someone has any idea what is wrong?:

 - I readed that with Linux Kernel 4.4 it is not possible anymore to switch back to fbdev. Is this right or why I does not get an /dev/fb0 framebuffer?
 - Is there a missing Kernel configuration for an CMOS compatible LCD?
- Is there a missing or wrong device tree node?
- ... (or something else I'm not aware of) ... ?

I would love to get a feedback in German or English. In attachmend you find the relevant device tree nodes.

My best to you

/ {
    panel {

        compatible = "ti,tilcdc,panel";
        status = "okay";


        panel-info {
            ac-bias           = <255>;      //AC Bias Pin Frequency
            ac-bias-intrpt    = <0>;        //AC Bias Pin Transitions per Interrupt
            dma-burst-sz      = <16>;       //DMA burst size
            bpp               = <24>;       //Bits per pixel
            fdd               = <0x80>;     //FIFO DMA Request Delay
            sync-edge         = <1>;        //Horizontal and Vertical Sync Edge: 0=rising 1=falling
            sync-ctrl         = <1>;        //Horizontal and Vertical Sync: Control: 0=ignore
            raster-order      = <1>;        //Raster Data Order Select: 1=Most-to-least 0=Least-to-most
            fifo-th           = <0>;        //DMA FIFO threshold

        };
        display-timings {
            native-mode = <&cmoslcd>;

            cmoslcd: 480x272p62 {

                clock-frequency = <9000000>;
                hactive         = <480>;
                vactive         = <272>;

                hback-porch     = <40>;
                hfront-porch    = <5>;
                hsync-len       = <1>;

                vback-porch     = <8>;
                vfront-porch    = <8>;
                vsync-len       = <1>;

                hsync-active    = <0>;  /* low active */
                vsync-active    = <0>;  /* low active */
                pixelclk-active = <1>;  /* high active */
                de-active       = <1>;  /* active high */
            };
        };

    };

};


&lcdc {
    pinctrl-names = "default";
    pinctrl-0 = <&lcd_pins>;
    status = "okay";
}


&am33xx_pinmux {
    pinctrl-names = "default";
    lcd_pins: lcd_pins {
        pinctrl-single,pins = <
            0x20 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad8.lcd_data16 */
            0x24 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad9.lcd_data17 */
            0x28 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad10.lcd_data18 */
            0x2c (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad11.lcd_data19 */
            0x30 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad12.lcd_data20 */
            0x34 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad13.lcd_data21 */
            0x38 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad14.lcd_data22 */
            0x3c (PIN_OUTPUT | MUX_MODE1)           /* gpmc_ad15.lcd_data23 */
            0xa0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data0.lcd_data0 */
            0xa4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data1.lcd_data1 */
            0xa8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data2.lcd_data2 */
            0xac (PIN_OUTPUT | MUX_MODE0)           /* lcd_data3.lcd_data3 */
            0xb0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data4.lcd_data4 */
            0xb4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data5.lcd_data5 */
            0xb8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data6.lcd_data6 */
            0xbc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data7.lcd_data7 */
            0xc0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data8.lcd_data8 */
            0xc4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data9.lcd_data9 */
            0xc8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data10.lcd_data10 */
            0xcc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data11.lcd_data11 */
            0xd0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data12.lcd_data12 */
            0xd4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data13.lcd_data13 */
            0xd8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data14.lcd_data14 */
            0xdc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data15.lcd_data15 */
            0xe0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_vsync.lcd_vsync */
            0xe4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_hsync.lcd_hsync */
            0xe8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_pclk.lcd_pclk */
            0xec (PIN_OUTPUT | MUX_MODE0)           /* lcd_ac_bias_en.lcd_ac_bias_en */
        >;
    };
};




Marco