Other Parts Discussed in Thread: AM5K2E02,
Hi Team.
There is E2E post about ARM Core Stall which is 798870: A memory read can stall indefinitely in the L2 cache as below.
AM5K2E02: ARM Core Stall
https://e2e.ti.com/support/processors/f/791/t/704294
Is AM5716 affected by this eratta ID 798870?
If yes, what is a workaround for it?
AM5716 is Cortex-A15 MPU Core r2p2. But it also show the following configurations affected.
So I would like to confirm if AM5716 is affected.
Configurations affected:
This erratum does not affect the processor if the revision and variant reported by the MIDR is r2p0, r2p1, r2p2, r2p3 or r2p4 and REVIDR[2] is set to 1.
To be affected by this erratum, the “L2 arbitration register slice” configuration option must be included
Thanks and Best regards,
Kuerbis