BIOS Linker Error

What version of CCS are you using? What version of Code Generation tools are you using?

It would appear that you are not using the linker command file that is generated by DSP/BIOS from the .tcf file. In CCSv3, this needs to be manually included into the project.

Regards,
RandyP

If this answers your question, please click the  Verify Answer  button below. If not, please reply back with more information.

 I am running the latest 4.2.4,
Question is where in Project variables I should set some section name flag and possible flags to include
_CLK_countspms
_MEM_alloc
_MEM_getBaseAddress
_MEM_init
in linker options?

Paul,

I assume you mean CCSv4.2.1.00004?

When you created your project, did you select it to be a DSP/BIOS 5 project? Or are you manually including bios6748.a674 in your Build Properties?

Is there a .tcf file in your project folder? And a linker command file in your build folder, probably .\Debug?

When you go through the sequence of steps to create a BIOS5 project and build that project, all of the steps are taken care of for you.

What version of Code Generation Tools are you using?

In CCSv3, you could start with a truly empty project and build up to a DSP/BIOS project. In CCSv4, you have to decide if it is going to be a DSP/BIOS project when you originally create the project.

Randy,

Thank you, one more question from the customer running CCS V3.3

I have almost ready configuration.
But I have one question to you:
I did not allocate any BUFFER resources but still have linking error:
"BMEM memory range overlaps existing memory range L3_CBA_RAM"
Could you help me resolve this situation?

Please let me know.

Randy;

Sorry, the customer keep the same subject heading in the latest response, please see below for further clarification:

I did not modify base memory settings for any of memory locations including IRAM which is initially L2Cache, L3RAM, DDR etc.

The only I played were the heap size in IRAM, in L3RAM and BUFFER allocations.

I found the following:

1. I took 3 different *.TCF files from /../package/examples directory of one BIOS the previous BIOS package and 2 *.TCF files from /package/examples directory the latest BIOS package is available. First of all, address settings for those memory locations the same(this is correct because C6748 the same and have the same resources)

2. Text file Configuration Manager, which modifying *.TCF files doesn't clean after itself even I delete or modify correspond functions. It just add them at the end of each corresponding section of TCF file. For example:

3.  

   bios.BUFF.create(BUFFER1)

   bios.BUFF.alloc(20000...)

   bios.BUFF.destroy(BUFFER1)

4. and after that add new configuration.

8. I can not modify this textual as they called file any way because Composer Studio 4.2.4 is not allowed me to do so, I can not modify it outside and import TCF file from tci file as I understand, because result textual file is compiled and have I think some checksum number.

9. In blog you point me I did not find any of those issues for processor C6748.

10. Point 2 may be not a problem, may be linker optimize all those expressions.

Point me where to look futher,

Please let me know.

Paul,

Are you posting these for the customer because you are working closely with them and looking at these files, or because they do not have direct access to the forum? Sorry to ask, but I get a bit confused over who "I" and "me" mean. No big deal, but curious.

Is this really a link-time error message? Or does it happen during the build step of the tcf file(s)?

If two memory ranges overlap, then one or both need to be changed so they do not overlap. Depending on where the memory configuration was done, that same place would be where the change needs to be done. It sounds like all configuration is done in tcf files, so that is where it needs to be fixed.

If the link step completes, even with errors, it will generate a .map file. Please look at this to determine exactly what is overlapping and what the intended regions are.

The .tcf file can be edited in any ASCII text editor, like NotePad. I do this all the time with CCSv4, especially to clean up objects that I created and later deleted.

To points 2 & 3 about the tcf file not being cleaned up, I have not run into a situation where this affected the build process. But if the bios.BUFF.alloc(20000...) creates an object that is too large, and if the config tool executes every step before the next one, then this could be a case where the tcf needs to be manually edited. I am just guessing since I have not experienced this myself.

My advice is for you to look with your customer at the .tcf files and .map file and the exact step in which the error message is presented, and from those to determine where the overlap occurs.

Regards,
RandyP

Randy:

Thank you, that helped, the customer has only one issue left, please see below

When I am loading program on target I have error with data verification at the entry point of .text section where located my object main.obj.

Could you advise something?

I added all necessary library and rtx library support to my program.  Please let me know and thank you for the continued support

What is the address where your .text section is located when it fails the data verification?

Prior to loading the program, can you write/read that same memory location through a memory window?

My blind analysis is that the memory being loaded is not accessible. The EMIF might not be configured yet, or an internal memory might be configured incorrectly for cache or not for cache.

Randy:

Responses from the customer (#1 is the first response, #5 is the last/latest response)

1)Thank you very much for you EMIF thought. I will check it right now. The address of .text section started in 0xC0008B5A0. It is definitely DDR. I did not try to read or write memory in the window, because I am linking XDS library to my application. Thank you very much, I will check everything right now.

2) I think I am initializing EMIF completely by using proper memory map for MEM address in *.TCF. I allowed to located all software except hardware interrupt vector table and hardware interrupt hooks in DDR from address C000...., HWI and HWI functions located in IRAM according to interrupt table requirements(low memory location). Please advice.
The current data verification address error now is 0xC008B1A0, just at the end of .text segment. I will try allocate .text in IRAM also.

Another version of thinking: I am using experiment version of XDS driver with libraries, may be it is the problem. I downloaded this version last week.

3) Short addition to previous email. It doesn't matter what section on this address. Data verification failed on same address 0xC008B1A0

4) Revert to previous version of XDS tools doesn't affect on error.

5) Is exist some LIGHT posiblity that DDR memory located on in address range C0000000-CF000000 without holes.

Let me give you my thoughts, I will attached memory map and you will see that correctly loaded in DDR only "HOLES" which doesn't have checksum and all the time 0. Any real section .text .bios or whatever else return error from the first byte of section! Please take a look at memory map.


Randy, I wantr to send you the map file,, but the website could not upload the file type, can you let me know your e-mail so I can send it to you.  thank you.

Paul,

If you cannot attach the .map file, change the extension to .txt or put it in a .zip file. Those should all work. I am not sure why .map has not been allowed. I will look into that.

How are you loading your program? Through CCS (which version) or through a bootloading process?

In either case, the EMIF registers have to have proper values written to them to configure the EMIF peripheral before you can access any memory devices on the EMIF bus. DDR is accessed through an EMIF peripheral and there are registers that must be written so the DDR is accessible. This is usually done through GEL files when loading through CCS or special bootloading commands when loading through a bootloader.

This is the EMIF configuration that I was referring to in my earlier post.

What do you mean by "XDS tools" and "XDS libraries"?

Regards,
RandyP

Randy:

Here is the file, thanks

2465.C6748_EVM.zip

Randy:

See below from the customer:

I am loading my program through CCS V4.2.4 (the latest).

In my project I do not have GEL file because GEL file which is coming together with other software for version CCS 3.3 have no any contest for EMIF.

Besides this I am using TCF configuration where I am specify that the some of the sections will be located in DDR memory starting C000000 and ending CF000000.

Based on previous programming I know that I do not need hook the interrupts but only in TCF configuration where I set the assembly entry points for interrupt functions in HWI section of TCF configuration. In this application  I am explicitly program the HWI in code by functions HWI_disable, HWI_attach, HWI_enable.

If is it the same story about EMIF. If so please guide me where and what function of BIOS/DSP library I can use to program explicitly EMIF, or please point me to proper GEL file which does that.

Paul,

I think both your customer and I are getting confused. Can you please help by re-wording some of the text to help me understand what is being said?

This 2nd thread started out as a question on CCS 3.3 but is it now on CCSv4? There is no CCSv4.2.4, but i asked earlier if I should assume this is 4.2.1.00004. Please confirm.

What did you mean by "XDS tools" and "XDS libraries" in the earlier post?

What is the paragraph about HWI trying to tell me?

I do not understand the line about no GEL file. He needs a GEL file.

Is this a custom board or an EVM? The EVM comes with a GEL file that would be a good starting point even for a custom board. I have attached one to use as an example for a starting point.

Regards,
RandyP

Randy:

This is a logicPD zoom kit.  Is there a way to do a conf call on this?  Please let me know.