• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 97 subscribers
  • Views 253 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RESET

Charles Gervasi
Expert 2270 points
Other Parts Discussed in Thread: TMS320C6748

I have a new board with a TMS320C6748 whose reset line is asserted.  I cannot figure out what is pulling the reset line down.  I have disconnected everything except for an FPGA, which I cannot disconnect b/c it runs on an internal layer, and the line is still pulled low. I confirmed that other lines from the same FPGA bank are tristated, but I cannot prove the FPGA is not driving reset.

If I pull it up through a 200 ohm resistor, it rises to 0.5V.  If I pull it up through a 100 ohm resistor, it goes to 1.1V.  My ammeter placed between 3.3V to reset shows 27mA. Resistance of DSP_RST when board is unpowered is in the low k ohm range.

I am not detecting any shorts to adjacent pads on the DSP or FPGA. 

I am going to attempt to get into the FPGA and verify it's not asserting output on the line. 

My question for TI is whether there is any failure mode you know of that could cause the DSP's reset input to pull its net down.

Thanks!!

CJ

  • 0
    TI__Mastermind 27585 points

    The best bet would be to put the FPGA into boundary scan mode and drive the pin high to check. If you cant do that then making a new FPGA image that will do this is the next step. The device should never drive the reset pin low, although there is a weak internal pull down on all pins.

    The fact that a 200 ohm pullup only gets it to 0.5V would strongly indicate that the FPGA is driving this.

    Jeff