CCS/TMS320C6748: C6748 DSPLIB DSPF_sp_fftSPxSP output issues

Veridian

Prodigy 20 points

Part Number: TMS320C6748

Tool/software: Code Composer Studio

I am having the same issue as:

DSPLIB : DSPF_sp_fftSPxSP usage and issues - Processors forum - Processors - TI E2E support forums

e2e.ti.com

Hello Sir, We are working on dra7xx-evm(AM5777) EVM with following setup : 1. bios_6_37_03_30 2. xdctools_3_25_06_96 3. CCS5.5 Issue : We are using

Has this ever been fixed?

I noticed that nobody every responded.

over 5 years ago

0 Rex Chang over 5 years ago

TI__Guru 50170 points

Hi, Veridian,

You didn't mention what exactly the problem is, but here is a similar issue on the FFT. Would the info in this thread same as yours and if the info helps?

https://e2e.ti.com/support/processors/f/791/t/883796

Rex

0 Veridian over 5 years ago in reply to Rex Chang

Prodigy 20 points

The problem was the exact one in the inked thread that was never responded to and solved it was just closed for no good reason. Forwarded to some other team and then it just sat there.

His problem was described in the linked file: 4150.DSPLib_FFT_issue.docx on that thread.

Either way, I believe that I already solved the issue. It is with the twiddle factor generation provided in the example code. The inner loop has a sequence sin cos sin cos....But it should be cos sin cos sin sequence. Now the output looks correct.

0 Rex Chang over 5 years ago in reply to Veridian

TI__Guru 50170 points

Hi, Veridian,

Thanks for the info on the sequence of the inner loop in the example code. If your issue is resolved, I'll close this thread, but we'll track down the example code issue on TI side.

Thanks!

Rex