Hi All,
I would like to ask a question on I2C configuration.
SPRU911a, Inter-Intergrated (I2C) Peripheral UG, said that the prescaled module clock must be set to 7-12 MHz. However, in Spectrum's EVMDM6437_I2C_init( ) function:
/* ------------------------------------------------------------------------ *
* *
* _I2C_init( ) *
* *
* Enable and initalize the I2C module *
* The I2C clk is set to run at 100 KHz *
* *
* ------------------------------------------------------------------------ */
Int16 EVMDM6437_I2C_init( )
{
I2C_ICMDR = 0; // Reset I2C
I2C_ICPSC = 13; // Config prescaler for 27MHz
I2C_ICCLKL = 5; // Config clk LOW for 100 kHz
I2C_ICCLKH = 5; // Config clk HIGH for 100 kHz
I2C_ICMDR |= ICMDR_IRS; // Release I2C from reset
return 0;
}
ICPSC is set ot 13, and since I2C input clock is 27MHz, the prescaled module clock frequency is then 27M /(13+1)= 1.93 MHz, which does not fall within the range of 7-12 MHz.
What is wrong here? Have I made any mistake in the calculation?
Another question is on the value of d. What is the purposes of d here? Why it is related to the IPSC value in the way as shown in the table above and takes only three values (7, 6, and 5)?
In table 8 above, does the "period of the module clock" refer to "I2C serial clock frequency" in Fig 3 above? If yes, then since "I2C serial clock frequency" is obtained by dividing "prescaled module clock frequency" by (ICCL+d) + (ICCH+d), an "multiplication" as described in Table 8 will generate the low-time duration value, and similarly for high-time duration value from ICCH. By setting different ICCL and ICCH value, we can control the ratio between low-time and high-time duration so that they two are not necessarily equal, is that true? Is the purpose of this design simply to allow more flexibility to the user?
And in practice, are ICCL and ICCH nearly always set to the same value to make both low-time and high-time duration 50% of the whole I2C serial clock period?
Thanks,
Zheng
